Analysis and design of high-speed and low-power CMOS PLAs

2001 ◽  
Vol 36 (8) ◽  
pp. 1250-1262 ◽  
Author(s):  
Jinn-Shyan Wang ◽  
Ching-Rong Chang ◽  
Chingwei Yeh
Keyword(s):  
Low Power ◽  
High Speed ◽  
Analysis And Design ◽  
Low Power Cmos

scholarly journals A HIGH-PERFORMANCE AND LOW-POWER DELAY BUFFER

2013 ◽  
pp. 78-82
Author(s):  
GOPALA KRISHNA.M ◽  
UMA SANKAR.CH ◽  
NEELIMA. S ◽  
KOTESWARA RAO.P
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
High Speed ◽  
High Performance ◽  
Vlsi Design ◽  
Flip Flop ◽  
Ring Counter ◽  
Double Edge ◽  
Low Power Cmos ◽  
Cmos Vlsi

In this paper, presents circuit design of a low-power delay buffer. The proposed delay buffer uses several new techniques to reduce its power consumption. Since delay buffers are accessed sequentially, it adopts a ring-counter addressing scheme. In the ring counter, double-edge-triggered (DET) flip-flops are utilized to reduce the operating frequency by half and the C-element gated-clock strategy is proposed. Both total transistor count and the number of clocked transistors are significantly reduced to improve power consumption and speed in the flip-flop. The number of transistors is reduced by 56%-60% and the Area-Speed-Power product is reduced by 56%-63% compared to other double edge triggered flip-flops. This design is suitable for high-speed, low-power CMOS VLSI design applications.

An ultra high speed low-power CMOS integrated current comparator

2008 ◽  
Author(s):  
Soheil Ziabakhsh ◽  
Hosein Alavi Rad ◽  
Alireza Saberkari ◽  
Shahriar Baradaran Shokouhi
Keyword(s):  
Low Power ◽  
High Speed ◽  
Current Comparator ◽  
Ultra High Speed ◽  
Low Power Cmos

1.5 V high speed low power CMOS current sense amplifier

1995 ◽  
Vol 31 (23) ◽  
pp. 1991-1993 ◽  
Author(s):  
Y.K. Seng ◽  
S.S. Rofail
Keyword(s):  
Low Power ◽  
High Speed ◽  
Sense Amplifier ◽  
Low Power Cmos

High Speed Low Power CMOS Comparator for Pipeline ADCs

2006 ◽  
Author(s):  
M.B. Guermaz ◽  
L. Bouzerara ◽  
A. Slimane ◽  
M.T. Belaroussi ◽  
B. Lehouidj ◽  
...  
Keyword(s):  
Low Power ◽  
High Speed ◽  
Low Power Cmos ◽  
Pipeline Adcs

A high speed and low power CMOS/SOS multiplier-accumulator

1983 ◽  
Vol 14 (6) ◽  
pp. 49-57 ◽  
Author(s):  
Jun Iwamura ◽  
Shinji Taguchi ◽  
Suganuma Kazuo ◽  
Kimura Minoru ◽  
Tango Hiroyuki ◽  
...  
Keyword(s):  
Low Power ◽  
High Speed ◽  
Low Power Cmos
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