A 1-V BiCMOS rail-to-rail amplifier with n-channel depletion mode input stage

1997 ◽  
Vol 32 (12) ◽  
pp. 2012-2022 ◽  
Author(s):  
R. Griffith ◽  
R.L. Vyne ◽  
R.N. Dotson ◽  
T. Petty
Keyword(s):  
Input Stage ◽  
Rail To Rail

scholarly journals A 0.3 V Rail-to-Rail Ultra-Low-Power OTA with Improved Bandwidth and Slew Rate

2021 ◽  
Vol 11 (2) ◽  
pp. 19
Author(s):  
Francesco Centurelli ◽  
Riccardo Della Sala ◽  
Pietro Monsurrò ◽  
Giuseppe Scotti ◽  
Alessandro Trifiletti
Keyword(s):  
Low Power ◽  
Low Voltage ◽  
Supply Voltage ◽  
Cmos Process ◽  
Slew Rate ◽  
Large Signal ◽  
Output Stage ◽  
Ultra Low Power ◽  
Input Stage ◽  
Rail To Rail

In this paper, we present a novel operational transconductance amplifier (OTA) topology based on a dual-path body-driven input stage that exploits a body-driven current mirror-active load and targets ultra-low-power (ULP) and ultra-low-voltage (ULV) applications, such as IoT or biomedical devices. The proposed OTA exhibits only one high-impedance node, and can therefore be compensated at the output stage, thus not requiring Miller compensation. The input stage ensures rail-to-rail input common-mode range, whereas the gate-driven output stage ensures both a high open-loop gain and an enhanced slew rate. The proposed amplifier was designed in an STMicroelectronics 130 nm CMOS process with a nominal supply voltage of only 0.3 V, and it achieved very good values for both the small-signal and large-signal Figures of Merit. Extensive PVT (process, supply voltage, and temperature) and mismatch simulations are reported to prove the robustness of the proposed amplifier.

Feedforward Bulk-Driven Class AB Fully-Differential Second-Generation Current Conveyor (FDCCII)

2014 ◽  
Vol 979 ◽  
pp. 62-65
Author(s):  
Thawatchai Thongleam ◽  
Varakorn Kasemsuwan
Keyword(s):  
Second Generation ◽  
Transfer Characteristic ◽  
Cmos Technology ◽  
Circuit Performance ◽  
Input Stage ◽  
Class Ab ◽  
Fully Differential ◽  
Rail To Rail ◽  
Differential Pair ◽  
Dc Current

In this paper, a feedforward bulk-driven class AB fully-differential second-generation current conveyer (FDCCII) is presented. Bulk-driven differential pair is employed for the input stage allowing the FDCCII to operate with rail-to-rail operation. Feedfoward technique is also incorporated into input stage to increase the DC gain and minimize the common mode gain. The circuit performance is verified using HSPICE in 0.18 μm CMOS technology. The simulation results show rail-to-rail input and output swings. The DC voltage transfer characteristic between ports Y and X and DC current transfer characteristic between ports X and Z shows good linearity. The bandwidths show 25.7 MHz (VX/VY), 30 MHz (IZ/IX), respectively. The power dissipation is 267.5 μW.

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