A 1.5-W single-chip MPEG-2 MP@ML video encoder with low power motion estimation and clocking

1997 ◽  
Vol 32 (11) ◽  
pp. 1807-1816 ◽  
Author(s):  
M. Mizuno ◽  
Y. Ooi ◽  
N. Hayashi ◽  
J. Goto ◽  
M. Hozumi ◽  
...  
Keyword(s):  
Motion Estimation ◽  
Low Power ◽  
Single Chip ◽  
Video Encoder

A Single-Chip 4K 60-fps 4:2:2 HEVC Video Encoder LSI Employing Efficient Motion Estimation and Mode Decision Framework With Scalability to 8K

2018 ◽  
Vol 26 (10) ◽  
pp. 1930-1938 ◽  
Author(s):  
Takayuki Onishi ◽  
Takashi Sano ◽  
Yukikuni Nishida ◽  
Kazuya Yokohari ◽  
Ken Nakamura ◽  
...  
Keyword(s):  
Motion Estimation ◽  
Mode Decision ◽  
Single Chip ◽  
Decision Framework ◽  
Video Encoder

A 1.2-W single-chip MPEG2 MP@ML video encoder LSI including wide search range (H±288, V:±96) motion estimation and 81-MOPS controller

1998 ◽  
Vol 33 (11) ◽  
pp. 1765-1771 ◽  
Author(s):  
E. Ogura ◽  
M. Takashima ◽  
D. Hiranaka ◽  
T. Ishikawa ◽  
Y. Yanagita ◽  
...  
Keyword(s):  
Motion Estimation ◽  
Single Chip ◽  
Search Range ◽  
Video Encoder

Low-Power Motion Estimation Processor with 3D Stacked Memory

2015 ◽  
Vol E98.A (7) ◽  
pp. 1431-1441 ◽  
Author(s):  
Shuping ZHANG ◽  
Jinjia ZHOU ◽  
Dajiang ZHOU ◽  
Shinji KIMURA ◽  
Satoshi GOTO
Keyword(s):  
Motion Estimation ◽  
Low Power ◽  
Stacked Memory

scholarly journals Low Power Digital Multimedia Telecommunication Designs

VLSI Design ◽  
2001 ◽  
Vol 12 (3) ◽  
pp. 301-315 ◽  
Author(s):  
Koon-Shik Cho ◽  
Jun-Dong Cho
Keyword(s):  
Motion Estimation ◽  
Low Power ◽  
Communication Systems ◽  
Matched Filter ◽  
Optimization Technique ◽  
Low Power Design ◽  
Multimedia Systems ◽  
Wireless Multimedia ◽  
Design Constraint ◽  
Power Capability

The increasing prominence of wireless multimedia systems and the need to limit power capability in very-high density VLSI chips have led to rapid and innovative developments in low-power design. Power reduction has emerged as a significant design constraint in VLSI design. The need for wireless multimedia systems leads to much higher power consumption than traditional portable applications. This paper presents possible optimization technique to reduce the energy consumption for wireless multimedia communication systems. Four topics are presented in the wireless communication systems subsection which deal with architectures such as PN acquisition, parallel correlator, matched filter and channel coding. Two topics include the IDCT and motion estimation in multimedia application.These topics consider algorithms and architectures for low power design such as using hybrid architecture in PN acquisition, analyzing the algorithm and optimizing the sample storage in parallel correlator, using complex matched filter that analog operational circuits controlled by digital signals, adopting bit serial arithmetic for the ACS operation in viterbi decoder, using CRC to adaptively terminate the SOVA iteration in turbo decoder, using codesign in RS codec, disabling the processing elements as soon as the distortion values become great than the minimum distortion value in motion estimation, and exploiting the relative occurrence of zero-valued DCT coefficient in IDCT.

A 1.59 Gpixel/s Motion Estimation Processor With $-$211 to +211 Search Range for UHDTV Video Encoder

2014 ◽  
Vol 49 (4) ◽  
pp. 827-837 ◽  
Author(s):  
Dajiang Zhou ◽  
Jinjia Zhou ◽  
Gang He ◽  
Satoshi Goto
Keyword(s):  
Motion Estimation ◽  
Search Range ◽  
Video Encoder
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