Quality engineering (Taguchi methods) for the development of electronic circuit technology

1995 ◽  
Vol 44 (2) ◽  
pp. 225-229 ◽  
Author(s):  
G. Taguchi
Keyword(s):  
Electronic Circuit ◽  
Taguchi Methods ◽  
Quality Engineering ◽  
Circuit Technology

GaAs Integrated Laser And Electronic Circuit Technology

1986 ◽  
Author(s):  
F. Brillouet ◽  
A. Clei ◽  
N. Bouadma ◽  
R. Lefevre ◽  
R. Azoulay ◽  
...  
Keyword(s):  
Electronic Circuit ◽  
Circuit Technology

scholarly journals Stretchability—The Metric for Stretchable Electrical Interconnects

Micromachines ◽  
2018 ◽  
Vol 9 (8) ◽  
pp. 382 ◽  
Author(s):  
Bart Plovie ◽  
Frederick Bossuyt ◽  
Jan Vanfleteren
Keyword(s):  
Measurement Errors ◽  
Electronic Circuit ◽  
Dead Reckoning ◽  
Electrical Interconnects ◽  
Length Increase ◽  
Material Usage ◽  
Final Measurement ◽  
Stretchable Interconnects ◽  
Circuit Technology ◽  
Stretchable Interconnect

Stretchable circuit technology, as the name implies, allows an electronic circuit to adapt to its surroundings by elongating when an external force is applied. Based on this, early authors proposed a straightforward metric: stretchability—the percentage length increase the circuit can survive while remaining functional. However, when comparing technologies, this metric is often unreliable as it is heavily design dependent. This paper aims to demonstrate this shortcoming and proposes a series of alternate methods to evaluate the performance of a stretchable interconnect. These methods consider circuit volume, material usage, and the reliability of the technology. This analysis is then expanded to the direct current (DC) resistance measurement performed on these stretchable interconnects. A simple dead reckoning approach is demonstrated to estimate the magnitude of these measurement errors on the final measurement.

Preparation of TEM samples by focused ion beams

1995 ◽  
Vol 53 ◽  
pp. 518-519
Author(s):  
John F. Walker ◽  
J C Reiner ◽  
C Solenthaler
Keyword(s):  
Integrated Circuit ◽  
Polycrystalline Silicon ◽  
Field Effect Transistor ◽  
High Spatial Resolution ◽  
Ion Beam ◽  
Ion Beams ◽  
Focused Ion Beams ◽  
Precise Location ◽  
Effect Transistor ◽  
Circuit Technology

The high spatial resolution available from TEM can be used with great advantage in the field of microelectronics to identify problems associated with the continually shrinking geometries of integrated circuit technology. In many cases the location of the problem can be the most problematic element of sample preparation. Focused ion beams (FIB) have previously been used to prepare TEM specimens, but not including using the ion beam imaging capabilities to locate a buried feature of interest. Here we describe how a defect has been located using the ability of a FIB to both mill a section and to search for a defect whose precise location is unknown. The defect is known from electrical leakage measurements to be a break in the gate oxide of a field effect transistor. The gate is a square of polycrystalline silicon, approximately 1μm×1μm, on a silicon dioxide barrier which is about 17nm thick. The break in the oxide can occur anywhere within that square and is expected to be less than 100nm in diameter.

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