Characterization of ultrathin oxynitride (18-21 A) gate dielectrics by NH/sub 3/ nitridation and N/sub 2/O RTA treatment

2001 ◽  
Vol 48 (5) ◽  
pp. 907-912 ◽  
Author(s):  
Tung Ming Pan ◽  
Tan Fu Lei ◽  
Huang Chun Wen ◽  
Tien Sheng Chao
Keyword(s):  
Gate Dielectrics

Noise Characterization of InAs Based Composite Channel DG -MOSHEMT with Different Gate Dielectrics

Silicon ◽  
2021 ◽  
Author(s):  
G. Sujatha ◽  
N. Mohankumar ◽  
R. Poornachandran ◽  
R. Saravana Kumar ◽  
Girish Shankar Mishra ◽  
...  
Keyword(s):  
Gate Dielectrics ◽  
Composite Channel ◽  
Noise Characterization

Electrical Characterization of Oxynitrided Gate Dielectrics under Constant‐Current Fowler‐Nordheim Stress

1997 ◽  
Vol 144 (9) ◽  
pp. 3299-3304 ◽  
Author(s):  
T. K. Nguyen ◽  
L. M. Landsberger ◽  
S. Belkouch ◽  
C. Jean
Keyword(s):  
Gate Dielectrics ◽  
Electrical Characterization ◽  
Constant Current

Process and Manufacturing Challenges for High-K Gate Stack Systems

1999 ◽  
Vol 567 ◽  
Author(s):  
M.C. Gilmer ◽  
T-Y Luo ◽  
H.R. Huff ◽  
M.D. Jackson ◽  
S. Kim ◽  
...  
Keyword(s):  
Silicon Surface ◽  
Gate Dielectrics ◽  
Electrical Characterization ◽  
Metal Electrode ◽  
Significant Variable ◽  
Tem Analysis ◽  
Physical Mechanisms ◽  
High K ◽  
Commercial Equipment

ABSTRACTA design-of-experiments methodology was implemented to assess the commercial equipment viability to fabricate the high-K dielectrics Ta2O5, TiO2 and BST (70/30 and 50/50 compositions) for use as gate dielectrics. The high-K dielectrics were annealed in 100% or 10% O2 for different times and temperatures in conjunction with a previously prepared NH3 nitrided or 14N implanted silicon surface. Five metal electrode configurations—Ta, TaN, W, WN and TiN—were concurrently examined. Three additional silicon surface configurations were explored in conjunction with a more in-depth set of time and temperature anneals for Ta2O5. Electrical characterization of capacitors fabricated with the above high-K gate dielectrics, as well as SIMS and TEM analysis, indicate that the post high-K deposition annealing temperature was the most significant variable impacting the leakage current density, although there was minimal influence on the capacitance. Further studies are required, however, to clarify the physical mechanisms underlying the electrical data presented.

Materials and Physical Properties of Novel High-k and Medium-k Gate Dielectrics

2001 ◽  
Vol 670 ◽  
Author(s):  
Ran Liu ◽  
Stefan Zollner ◽  
Peter Fejes ◽  
Rich Gregory ◽  
Shifeng Lu ◽  
...  
Keyword(s):  
Thin Film ◽  
Transition Metal Oxides ◽  
Gate Dielectrics ◽  
Low Leakage ◽  
Low Leakage Current ◽  
High K ◽  
Compositional Properties ◽  
Sharp Interfaces ◽  
Selection Of

ABSTRACTRapid shrinking in device dimensions calls for replacement of SiO2 by new gate insulators in future generations of MOSFETs. Among many desirable properties, potential candidates must have a higher dielectric constant, low leakage current, and thermal stability against reaction or diffusion to ensure sharp interfaces with both the substrate Si and the gate metal (or poly-Si). Extensive characterization of such materials in thin-film form is crucial not only for selection of the alternative gate dielectrics and processes, but also for development of appropriate metrology of the high-k films on Si. This paper will report recent results on structural and compositional properties of thin film SrTiO3 and transition metal oxides (ZrO2and HfO2).

Characterization of GaN MOS Structures Using Photoanodically Grown Oxides with Respect to FET Devices

2000 ◽  
Vol 639 ◽  
Author(s):  
D. Mistele ◽  
T. Rotter ◽  
R. Ferretti ◽  
F. Fedler ◽  
H. Klausing ◽  
...  
Keyword(s):  
Gate Dielectrics ◽  
Photoelectrochemical Cell ◽  
Oxide Growth ◽  
Metal Source ◽  
Device Applications ◽  
Small Density ◽  
Wet Chemical ◽  
Mos Structures ◽  
Strong Depletion

ABSTRACTPhotoanodically grown Ga2O3 layers were characterized with respect to their suitability as gate dielectrics for GaN based MOSFET Device applications. The Ga2O3 layers were produced in a photoelectrochemical cell using aqueous solutions of KOH. IV characterization of MOS structures show insulating behavior of the oxide layers and CV measurements indicate a small density of states at the oxide/GaN interface. Integrating the wet chemical oxide growth in a MOSFET device fabricating process includes tungsten as gate metal together with H2O2 as etching solution for the gate metal. Source/drain areas were made free of oxide by the alkaline developer of a conventional lithographic step and metallization was done by using the liftoff technique. MOS structures show no inversion mode but strong depletion in reverse biasing mode.

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