A new low-temperature bonding technology between large-area, high-power devices and Mo electrodes using Au-Al films

1997 ◽  
Vol 44 (12) ◽  
pp. 2154-2159 ◽  
Author(s):  
J. Onuki ◽  
M. Satou ◽  
S. Murakami ◽  
T. Yatsuo
Keyword(s):  
Low Temperature ◽  
High Power ◽  
Power Devices ◽  
Large Area ◽  
Bonding Technology ◽  
Low Temperature Bonding

The European 3D Heterogeneous Integration Platform (e-BRAINS) - a Particular Focus on Reliability and Low-Temperature Processes for 3D Integrated Sensor Systems

2015 ◽  
Vol 2015 (DPC) ◽  
pp. 001847-001884
Author(s):  
Peter Ramm ◽  
Armin Klumpp ◽  
Alan Mathewson ◽  
Kafil M. Razeeb ◽  
Reinhard Pufall
Keyword(s):  
Low Temperature ◽  
Heterogeneous Integration ◽  
Sensor Systems ◽  
Wafer Level ◽  
3D Integration ◽  
Integrated Sensor ◽  
Integration Platform ◽  
Ultrasonic Agitation ◽  
Bonding Technology ◽  
Low Temperature Bonding

The European 3D heterogeneous integration platform has been established by the consortium of the Integrated Project e-BRAINS [1], where technologies of the following relevant main categories of 3D integration are provided to enable future applications of smart sensor systems:3D System-on-Chip Integration - 3D-SOC: TSV technology for stacking of thinned devices or large IC blocks (global level),3D Wafer-Level-Packaging - 3D-WLP: embedding technology with through-polymer vias (TPV) for stacking of thinned ICs on wafer-level (no TSV), and3D System-in-Package - 3D-SIP: 3D stacking of packaged devices or substrates *definitions according to [2] Regarding TSV performance, the applications do not need ultra-high vertical interconnect densities as for 3D stacked Integrated Circuits – 3D-SIC*. Nevertheless, the lateral sizes of the TSVs are preferably minimized to allow for place and route for small “open” IC areas. Smaller TSVs are also preferred in order to reduce thermo-mechanical stress. e-BRAINS' focus is on how heterogeneous integration and sensor device technologies can be combined to bring new performance levels to targeted applications with high market potentials. The consortium, under coordination of Infineon and technical management by Fraunhofer EMFT, is composed of major European system manufacturers (Infineon, Siemens, SensoNor, 3D PLUS, Vermon and IQE), SMEs (DMCE, Magna Diagnostics, SORIN and eesy-ID), the large research institutions CEA Grenoble, Fraunhofer (EMFT Munich & IIS-EAS Dresden), imec, SINTEF, Tyndall and ITE Warsaw, and universities (EPFL Lausanne, TU Chemnitz and TU Graz). Target applications include automotive, ambient living and medical devices, with a specific focus on wireless sensor systems. Concerning the enabling 3D Heterogeneous Integration Platform, the e-BRAINS partners are working close together, where Infineon, Fraunhofer EMFT, imec and SINTEF are focusing mainly on 3D-SOC and 3D-WLP, and the French system manufacturer 3D PLUS and Tyndall on 3D-WLP and 3D-SIP technologies. The focus of this paper is on low-temperature bonding processes for highly reliable 3D integrated sensor systems. One of the key issues for heterogeneous systems production is the impact of 3D processes to the reliability of the product, i.e. the high built-in stresses caused by e.g. the CTE mismatch of complex layer structures (thin Si, ILDs, metals etc.) in combination with elevated bonding temperatures. As consequence, extensive project work was dedicated in the developments of reliable low-temperature bonding processes. Mainly intermetallic compound (IMC) bonding with Cu/Sn metal systems supported by ultrasonic agitation (Fraunhofer EMFT) was successfully introduced in 3D integration technology (see Fig. 2). A copper/tin solid-liquid interdiffusion (SLID) system was investigated using ultrasonic agitation to reduce the assembly temperature below the melting point of tin. Cleaning procedures are important shortly before joining the samples; dry cleaning has best results due to removal of thin oxide layers. Figure 2 shows a cross section of US supported Cu/Sn bonding at 150C. The intermetallic compounds Cu3Sn and Cu6Sn5 as well as pure tin easily can be identified. Due to low temperature assembly the most stable intermetallic compound (IMC) Cu3Sn has a minor share of the metal system. Most importantly there is no gap between top and bottom part of the joint despite the macroscopic assembly temperature is far away from the melting point of tin. But maybe the ultrasonic agitation brings enough energy to the interfaces, so locally melting can occur. In this way robust IMC bonding technology at 150C could be demonstrated with shear forces of 17 MPa and an alignment accuracy of 3 μm, well-suited for 3D integration. Figure 2: Low-temperature IMC bonding technology using ultrasonic agitation (Fraunhofer EMFT) Reliability for SLID contacts is certainly a very challenging objective especially looking for robust solutions in automotive applications. Thermally induced mechanical stress is the main reason for early fails during temperature cycling. Cross sectioned samples were investigated and methods like nanoindentation, Raman spectroscopy, fibDAC, and high local resolution x-ray scattering were applied to measure the intrinsic stresses. It can be shown that low temperature bonding is the right approach to avoid excessive stress cracking the interface or even fracturing the silicon. Also fatigue of metals can be reduced in a range that plastic deformation is no lifetime limiting factor.

Low Temperature Bonding of High Density Large Area Array Interconnects for 3D Integration

2010 ◽  
Vol 2010 (1) ◽  
pp. 000028-000035 ◽  
Author(s):  
Jason D. Reed ◽  
Matthew Lueck ◽  
Chris Gregory ◽  
Alan Huffman ◽  
John M. Lannon ◽  
...  
Keyword(s):  
Low Temperature ◽  
Cross Sections ◽  
Test Performance ◽  
Stress Testing ◽  
Large Area ◽  
Bond Yield ◽  
Intermetallic Compound Formation ◽  
Before And After ◽  
Individual Bond ◽  
Low Temperature Bonding

The results of bonding and stress testing of Cu/Sn-Cu bonded dice and Cu-Cu thermocompression bonded dice at 10μm and 15μm pitch in large area arrays are shown. The interconnect bonding process pressure and temperature required for the formation of low resistance (<100 mΩ), high yielding (99.99 % individual bond yield), and reliable interconnects is described. In the case of Cu/Sn-Cu, use of a mechanical key was found to improve yield. A run of 22 consecutive bond pairs was made with the mechanical key, resulting in 98 % aggregate channel yield at 10μm pitch in area arrays containing 325,632 individual bonds per die to achieve an interconnect density of 106 / cm2. SEM cross sections of Cu/Sn-Cu and Cu-Cu bonded samples and EDS analysis of Cu/Sn intermetallic compounds both before and after stress testing are presented. The results of thermal cycling and humidity-temperature testing on electrical yield and resistance are presented for Cu/Sn-Cu with underfill. Comparison of the electrical and shear test performance of Cu/Sn-Cu and Cu-Cu is made. Low temperature bonding (at 210°C, below the melting point of tin) is demonstrated to produce high electrical yield, high shear strength and similar intermetallic compound formation to devices bonded at 300°C. The low temperature process may prove useful for integrating IC devices that have low thermal budgets.

S2-T4: Low-temperature substrate bonding technology for high power GaN-on-diamond HEMTs

2014 ◽  
Author(s):  
Kenneth K. Chu ◽  
Pane C. Chao ◽  
Jose A. Diaz ◽  
Thomas Yurovchak ◽  
Carlton T. Creamer ◽  
...  
Keyword(s):  
Low Temperature ◽  
High Power ◽  
Bonding Technology

Low-temperature bonding technique for fabrication of high-power GaN-based blue vertical light-emitting diodes

2012 ◽  
Vol 34 (8) ◽  
pp. 1327-1329 ◽  
Author(s):  
Wen-Jie Liu ◽  
Xiao-Long Hu ◽  
Jiang-Yong Zhang ◽  
Guo-En Weng ◽  
Xue-Qin Lv ◽  
...  
Keyword(s):  
Low Temperature ◽  
High Power ◽  
Light Emitting Diodes ◽  
Light Emitting ◽  
Low Temperature Bonding ◽  
Bonding Technique

Low Temperature Cu–Cu Bonding Technology in Three-Dimensional Integration: An Extensive Review

2018 ◽  
Vol 140 (1) ◽  
Author(s):  
Asisa Kumar Panigrahy ◽  
Kuan-Neng Chen
Keyword(s):  
Low Temperature ◽  
Integrated Circuit ◽  
Large Scale ◽  
Three Dimensional ◽  
3D Ic ◽  
Bonding Technology ◽  
Three Dimensional Integrated Circuit ◽  
Low Temperature Bonding ◽  
Cu Bonding

Arguably, the integrated circuit (IC) industry has received robust scientific and technological attention due to the ultra-small and extremely fast transistors since past four decades that consents to Moore's law. The introduction of new interconnect materials as well as innovative architectures has aided for large-scale miniaturization of devices, but their contributions were limited. Thus, the focus has shifted toward the development of new integration approaches that reduce the interconnect delays which has been achieved successfully by three-dimensional integrated circuit (3D IC). At this juncture, semiconductor industries utilize Cu–Cu bonding as a key technique for 3D IC integration. This review paper focuses on the key role of low temperature Cu–Cu bonding, renaissance of the low temperature bonding, and current research trends to achieve low temperature Cu–Cu bonding for 3D IC and heterogeneous integration applications.

A low-temperature bonding method for high power device packaging based on In-infiltrated nanoporous Cu

2020 ◽  
Vol 31 (17) ◽  
pp. 14157-14164
Author(s):  
Chunjin Hang ◽  
Jiahao Liu ◽  
Jianqiang Wang ◽  
Xing Fu ◽  
Hongtao Chen ◽  
...  
Keyword(s):  
Low Temperature ◽  
High Power ◽  
Power Device ◽  
Low Temperature Bonding ◽  
Bonding Method
Sign in / Sign up

Export Citation Format

Share Document