Digital signal processors for a signal processing laboratory

1999 ◽  
Vol 42 (3) ◽  
pp. 192-199 ◽  
Author(s):  
L. Moreno ◽  
J.F. Sigut ◽  
J.J. Merino ◽  
J.I. Estevez ◽  
J.L. Sanchez ◽  
...  
Keyword(s):  
Signal Processing ◽  
Digital Signal ◽  
Digital Signal Processors ◽  
Signal Processors

scholarly journals Approximate Adder Implementation using Quantum- Dot Cellular Automata for Digital Signal Processing

2019 ◽  
Vol 9 (2) ◽  
pp. 3743-3748
Keyword(s):  
Signal Processing ◽  
Cellular Automata ◽  
Quantum Dot ◽  
Digital Signal ◽  
Error Resilience ◽  
Digital Signal Processors ◽  
Approximate Computing ◽  
Quantum Dot Cellular Automata ◽  
Area Efficiency ◽  
Signal Processors

We explore quantum-dot cellular automata (QCA) design for approximate computing units in digital signal processors. For this cause, a common approach for design is introduced, and approximation-oriented mirror adders (AMA) are developed. In this work, we compromise power/area efficiency of circuit-level design with accuracy supervision. We compare Approximate Mirror Adder cells designed using conventional CMOS technique and using QCA. Our technique picks fairly accurate adder designs that minimalize the over-all area, hitherto maintaining the ultimate performance by studying their error resilience.

Introducing Undergraduate Students to The Use of Digital Signal Processors

1994 ◽  
Vol 31 (1) ◽  
pp. 66-83 ◽  
Author(s):  
N. Dahnoun ◽  
F. S. Schlindwein
Keyword(s):  
Signal Processing ◽  
Digital Signal Processing ◽  
Undergraduate Students ◽  
Digital Signal ◽  
Digital Signal Processors ◽  
Signal Processing Algorithms ◽  
Processing Algorithms ◽  
Signal Processors

Introducing undergraduate students to the use of digital signal processors This article describes a procedure for teaching undergraduate students the implementation of digital signal processing algorithms (using the TMS320C25). Material used, description of the processor, examples and working assembly codes are presented.

scholarly journals Practical realizations of optimized adaptive digital signal processing solutions implemented in preset time count rate meters

2005 ◽  
Vol 18 (3) ◽  
pp. 559-570
Author(s):  
Aleksandar Zigic ◽  
Vojislav Arandjelovic ◽  
Ðordje Saponjic ◽  
Ivana Veselinovic
Keyword(s):  
Signal Processing ◽  
Digital Signal Processing ◽  
Count Rate ◽  
Experimental Validation ◽  
Digital Signal ◽  
Digital Signal Processors ◽  
Experimental Results ◽  
Theoretical Predictions ◽  
Preset Time ◽  
Signal Processors

Two optimized adaptive digital signal processors were implemented to the preset time count rate meters. Three mean count rate meters, based on the developed adaptive digital signal processors, were realized and were used for experimental validation of proposed adaptive digital signal processors. The experimental results, conducted without and with radioisotope for the specified errors of 10% and 5%, showed to agree well with theoretical predictions.

scholarly journals Digital signal processing designing for FPGA architectures

2007 ◽  
Vol 20 (3) ◽  
pp. 437-459 ◽  
Author(s):  
Mariusz Rawski ◽  
Bogdan Falkowski ◽  
Tadeusz Łuba
Keyword(s):  
Signal Processing ◽  
Digital Signal Processing ◽  
Digital Signal ◽  
Digital Signal Processors ◽  
Distributed Arithmetic ◽  
Embedded Blocks ◽  
Signal Processing Algorithms ◽  
Signal Processors ◽  
High Degree ◽  
Very High

This paper presents the discussion on efficiency of different implementation methodologies of DSP algorithms targeted for modern FPGA architectures. Modern programmable structures are equipped with specialized DSP embedded blocks that allow implementing digital signal processing algorithms with use of the methodology known from digital signal processors. On the first place however, programmable architectures give the designer the possibility to increase efficiency of designed system by exploitation of parallelism of implemented algorithms. Moreover, it is possible to apply special techniques such as distributed arithmetic (DA) that will boost the performance of designed processing systems. Additionally, application of the functional decomposition based methods, known to be best suited for FPGA structures allows utilizing possibilities of programmable technology in very high degree. The paper presents results of comparison of different design approaches in this area.

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