A fault-tolerant CEQRNS processing element for linear systolic array DSP applications

1995 ◽  
Vol 44 (9) ◽  
pp. 1121-1130 ◽  
Author(s):  
J.C. Smith ◽  
F.J. Taylor
Keyword(s):  
Systolic Array ◽  
Fault Tolerant ◽  
Processing Element ◽  
Dsp Applications

High Throughput Realization of a New Systolic Array based FFT using CORDIC

2012 ◽  
Vol 2 (2) ◽  
pp. 53-59
Author(s):  
Gourav Jain ◽  
Shaik Rafi Ahamed
Keyword(s):  
Fourier Transform ◽  
Discrete Fourier Transform ◽  
High Throughput ◽  
Systolic Array ◽  
Digital Computer ◽  
High Speed ◽  
Clock Cycle ◽  
Complex Multiplication ◽  
Computer Complex ◽  
Dsp Applications

In this paper, the authors propose a new systolic array for radix-2, N-point discrete Fourier Transform (DFT) computation based on CORDIC (CO-ordinate Rotation Digital Computer). Complex multiplication can be done by this in a rather simple and elegant way. A CORDIC based multiplier less DFT architecture is designed in order to improve the performance of the system. It is able to provide two transforms per each clock cycle. The proposed design is well suited for high speed DSP-applications.

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