On the design of fault-tolerant two-dimensional systolic arrays for yield enhancement

1989 ◽  
Vol 38 (4) ◽  
pp. 515-525 ◽  
Author(s):  
J.H. Kim ◽  
S.M. Reddy
Keyword(s):  
Fault Tolerant ◽  
Yield Enhancement ◽  
Systolic Arrays ◽  
Two Dimensional

scholarly journals Exponential suppression of bit or phase errors with cyclic error correction

Nature ◽  
2021 ◽  
Vol 595 (7867) ◽  
pp. 383-387
Author(s):  
◽  
Zijun Chen ◽  
Kevin J. Satzinger ◽  
Juan Atalaya ◽  
Alexander N. Korotkov ◽  
...  
Keyword(s):  
Error Correction ◽  
Error Detection ◽  
Fault Tolerant ◽  
Error Rates ◽  
Quantum Error Correction ◽  
Superconducting Qubits ◽  
Two Dimensional ◽  
Logical Error ◽  
Quantum Error ◽  
Logical Qubit

AbstractRealizing the potential of quantum computing requires sufficiently low logical error rates1. Many applications call for error rates as low as 10−15 (refs. 2–9), but state-of-the-art quantum platforms typically have physical error rates near 10−3 (refs. 10–14). Quantum error correction15–17 promises to bridge this divide by distributing quantum logical information across many physical qubits in such a way that errors can be detected and corrected. Errors on the encoded logical qubit state can be exponentially suppressed as the number of physical qubits grows, provided that the physical error rates are below a certain threshold and stable over the course of a computation. Here we implement one-dimensional repetition codes embedded in a two-dimensional grid of superconducting qubits that demonstrate exponential suppression of bit-flip or phase-flip errors, reducing logical error per round more than 100-fold when increasing the number of qubits from 5 to 21. Crucially, this error suppression is stable over 50 rounds of error correction. We also introduce a method for analysing error correlations with high precision, allowing us to characterize error locality while performing quantum error correction. Finally, we perform error detection with a small logical qubit using the 2D surface code on the same device18,19 and show that the results from both one- and two-dimensional codes agree with numerical simulations that use a simple depolarizing error model. These experimental demonstrations provide a foundation for building a scalable fault-tolerant quantum computer with superconducting qubits.

CALCULATIONS OF HIGH DEPENDABILITY ON FLOWING SYSTOLIC ARRAYS FOR TWO MATRIX MULTIPLICATION

2011 ◽  
Vol 03 (01) ◽  
pp. 77-86
Author(s):  
DRAGAN M. RANDJELOVIĆ
Keyword(s):  
Matrix Multiplication ◽  
Systolic Arrays ◽  
Two Dimensional ◽  
Rectangular Matrix ◽  
High Dependability ◽  
Rectangular Matrix Multiplication ◽  
Nested Loop

The objective of this paper is to discuss systolic arrays (SAs) that are suitable for regular three-nested loop algorithms implementation and which enable the possibility of high dependability calculations for the SAs obtained in this way. This is made by considering the different possible values of flow period of processor for SAs synthesized on adaptable algorithms. Therefore, the algorithm for two matrix multiplication is one typical adaptable algorithm obtained results illustrated in the end of this paper by the examples of two rectangular matrix multiplication realized with the so called flowing and hexagonal two dimensional 2D SAs of planar SAs group.

Restructuring for fault-tolerant systolic arrays

1989 ◽  
Vol 38 (2) ◽  
pp. 307-311 ◽  
Author(s):  
H.F. Li ◽  
R. Jayakumar ◽  
C. Lam
Keyword(s):  
Fault Tolerant ◽  
Systolic Arrays
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