scholarly journals Robust Microfabrication of Highly Parallelized Three-Dimensional Microfluidics on Silicon

2019 ◽  
Author(s):  
Sagar Yadavali ◽  
Daeyeon Lee ◽  
David Issadore
Keyword(s):  
Mechanical Stability ◽  
Three Dimensional ◽  
Small Diameter ◽  
Microfluidic Chips ◽  
Single Chip ◽  
Materials Synthesis ◽  
Etch Stop ◽  
On Chip ◽  
Silicon Vias ◽  
Droplet Generators

AbstractWe present a new, robust three dimensional microfabrication method for highly parallel microfluidics, to improve the throughput of on-chip material synthesis by allowing parallel and simultaneous operation of many replicate devices on a single chip. Recently, parallelized microfluidic chips fabricated in Silicon and glass have been developed to increase the throughput of microfluidic materials synthesis to an industrially relevant scale. These parallelized microfluidic chips require large arrays (> 10,000) of Through Silicon Vias (TSVs) to deliver fluid from delivery channels to the parallelized devices. Ideally, these TSVs should have a small footprint to allow a high density of features to be packed into a single chip, have channels on both sides of the wafer, and at the same time minimize debris generation and wafer warping to enable permanent bonding of the device to glass. Because of these requirements and challenges, previous approaches cannot be easily applied to produce three dimensional microfluidic chips with a large array of TSVs. To address these issues, in this paper we report a fabrication strategy for the robust fabrication of three-dimensional Silicon microfluidic chips consisting of a dense array of TSVs, designed specifically for highly parallelized microfluidics. In particular, we have developed a two-layer TSV design that allows small diameter vias (d < 20 µm) without sacrificing the mechanical stability of the chip and a patterned SiO2 etch-stop layer to replace the use of carrier wafers in Deep Reactive Ion Etching (DRIE). Our microfabrication strategy allows >50,000 (d = 15 µm) TSVs to be fabricated on a single 4” wafer, using only conventional semiconductor fabrication equipment, with 100% yield (M = 16 chips) compared to 30% using previous approaches. We demonstrated the utility of these fabrication strategies by developing a chip that incorporates 20,160 flow focusing droplet generators onto a single 4” Silicon wafer, representing a 100% increase in the total number of droplet generators than previously reported. To demonstrate the utility of this chip for generating pharmaceutical microparticle formulations, we generated 5–9 µm polycaprolactone particles with a CV <5% at a rate as high as 60 g/hr (> 1 trillion particles / hour).

scholarly journals System-on-chip testing

2019 ◽  
Author(s):  
Παναγιώτης Γεωργίου
Keyword(s):  
Integrated Circuits ◽  
Three Dimensional ◽  
Rectangle Packing ◽  
3D Ics ◽  
Systems On Chip ◽  
Self Test ◽  
Chip Testing ◽  
On Chip ◽  
Silicon Vias ◽  
Access Mechanisms

Διανύουμε ήδη την εποχή του "Ίντερνετ των Πραγμάτων". Οι κοινές συσκευές που χρησιμοποιούμε καθημερινά, συνδέονται μεταξύ τους και γίνονται "εξυπνότερες" με ραγδαίους ρυθμούς. Σε κάθε τέτοια συσκευή βρίσκεται ένα Σύστημα σε Ολοκληρωμένο (Systems-On-Chip ή SoC). Το SoC εξελίσσεται συνεχώς, για να ικανοποιηθούν οι συνεχώς αυξανόμενες απαιτήσεις της νέας εποχής. Τα τρι-διάστατα ολοκληρωμένα κυκλώματα (three-dimensional integrated circuits - 3D-ICs) είναι μια υποσχόμενη λύση για να ικανοποιήσουν τις απαιτήσεις τις νέας εποχής και φαίνεται να εξασφαλίζουν τη συνέχιση του Νόμου του Moore στο άμεσο μέλλον. Τα 3D-ICs πετυχαίνουν υψηλότερη πυκνότητα πυλών και καλύτερη απόδοση από τα συμβατικά SoC και μειώνουν το κόστος διασύνδεσης και κατανάλωσης. Πρόσφατα, οι κατασκευαστικές εταιρείες ολοκληρωμένων συστημάτων κυκλοφόρησαν προϊόντα βασισμένα σε 3D-ICs. Η έρευνα αυτή εστιάζει στην ανάπτυξη νέων αρχιτεκτονικών μηχανισμού πρόσβασης ελέγχου (Test Access Mechanisms - TAMs) και νέων μεθόδων χρονοπρογραμματισμού ελέγχου ορθής λειτουργίας για 3D-SoCs, οι οποίες εκμεταλλεύονται την υψηλή ταχύτητα που προσφέρουν οι ειδικές κάθετες διασυνδέσεις μέσω-πυριτίου (Through Silicon Vias - TSVs), ενώ η κατανάλωση ισχύος και η θερμότητα πρέπει να διατηρηθούν κάτω από ορισμένα επίπεδα. Εισάγουμε μία νέα αρχιτεκτονική TAM για 3D SoCs, η οποία ελαχιστοποιεί το χρόνο ελέγχου ορθής λειτουργίας, το πλήθος των TSVs και τις γραμμές της αρχιτεκτονικής TAM που χρησιμοποιούνται για να μεταφερθούν τα δεδομένα ελέγχου. Ο χρονοπρογραμματισμός του ελέγχου ορθής λειτουργίας υπολογίζεται από μία αποδοτική μέθοδο χρονικής πολυπλεξίας και μία πολύ αποδοτική μέθοδο βελτιστοποίησης που βασίζεται στους αλγορίθμους rectangle-packing και simulated-annealing. Πειραματικά αποτελέσματα δείχνουν έως και 9.6 φορές εξοικονόμηση στο χρόνο ελέγχου με την προτεινόμενη μέθοδο, ειδικά κάτω από αυστηρά όρια για την κατανάλωση ισχύος και τη θερμότητα. Η προηγούμενη μέθοδος είναι συμβατή μόνο με TAMs που βασίζονται σε αρτηρίες (buses), οι οποίες απαιτούν διασυνδέσεις μεγάλου μήκους και πολλά buffers σε κάθε επίπεδο του 3D-IC, επομένως δεν καταφέρνουν να εκμεταλλευτούν πλήρως τις υψηλές συχνότητες των TSVs. Προτείνουμε μία νέα αρχιτεκτονική TAM βασισμένη στη χρονική πολυπλεξία, που χρησιμοποιεί σειριακές αλυσίδες (daisy-chains) για να ξεπεράσουμε τους περιορισμούς της προηγούμενης μεθόδου. Η μέθοδος αυτή προσφέρει μεγαλύτερα κέρδη όσον αφορά το χρόνο ελέγχου ορθής λειτουργίας και το κόστος διασύνδεσης. Η έρευνα αυτή εστιάζει στη βελτίωση ανίχνευσης σφαλμάτων συσκευών βασιζόμενων σε επεξεργαστή. Οι ολοένα αυξανόμενες απαιτήσεις της αγοράς για υψηλότερη υπολογιστική απόδοση σε μικρότερο κόστος και χαμηλότερη κατανάλωση ισχύος, οδηγεί τους κατασκευαστές στην ανάπτυξη νέων μικροεπεξεργαστών, που εισάγουν νέες προκλήσεις στον έλεγχο συσκευών βασιζόμενων σε επεξεργαστή. Η ανάγκη ελέγχου των συσκευών αυτών κατά τη διάρκεια της κανονικής τους λειτουργίας, επιβάλλουν τη συμπληρωματική χρήση μεθόδων ελέγχου που δεν επηρεάζουν τη λειτουργία, όπως ο «αυτοέλεγχος βασισμένος σε λογισμικό» (Software-Based Self-Test - SBST). Οι περισσότερες τεχνικές SBST στοχεύουν μόνο το μοντέλο σφαλμάτων stuck-at, που δεν αρκεί για την ανίχνευση πολλών σφαλμάτων. Επίσης, οι τεχνικές SBST απαιτούν εκτενή ανθρώπινη ενασχόληση με μεγάλους χρόνους ανάπτυξης των προγραμμάτων ελέγχου. Επιπλέον, περιλαμβάνουν την κοστοβόρα, από άποψη υπολογιστική ισχύος, εξομοίωση σφαλμάτων SoCs με εκατομμύρια πύλες για εκατομμύρια κύκλους ρολογιού, χρησιμοποιώντας πολλαπλά μοντέλα σφαλμάτων και εξειδικευμένους λειτουργικούς εξομοιωτές. Εισάγουμε την πρώτη μέθοδο που δεν μεροληπτεί υπέρ κάποιου συγκεκριμένου μοντέλου σφαλμάτων. Η μέθοδος αυτή προσφέρει σύντομο χρόνο δημιουργίας προγραμμάτων ελέγχου, υπό αυστηρό περιορισμό στο χρόνο ελέγχου ορθής λειτουργίας και στο μέγεθος των προγραμμάτων ελέγχου. Τα προγράμματα ελέγχου αξιολογούνται από μία νέα αποδοτική πιθανοτική μέθοδο SBST, εκμεταλλευόμενη την αρχιτεκτονική του επεξεργαστή, καθώς και τη netlist του επεξεργαστή σε επίπεδο πυλών που έχει προκύψει από σύνθεση. Η προτεινόμενη μετρική που βασίζεται στα output deviations είναι πολύ γρήγορη καθώς δεν απαιτεί τη χρονοβόρα διαδικασία της εξομοίωσης σφαλμάτων και μπορεί να εφαρμοστεί σε οποιαδήποτε μέθοδο που βασίζεται στην τεχνική SBST.

scholarly journals Micro–Macro: Selective Integration of Microfeatures Inside Low-Cost Macromolds for PDMS Microfluidics Fabrication

Micromachines ◽  
2019 ◽  
Vol 10 (9) ◽  
pp. 576 ◽  
Author(s):  
Edgar Jiménez-Díaz ◽  
Mariel Cano-Jorge ◽  
Diego Zamarrón-Hernández ◽  
Lucia Cabriales ◽  
Francisco Páez-Larios ◽  
...  
Keyword(s):  
Soft Lithography ◽  
Low Cost ◽  
Cost Effective ◽  
Microfluidic Chips ◽  
Single Chip ◽  
Lab On Chip ◽  
Molding Method ◽  
On Chip ◽  
Selective Integration ◽  
Important Progress

Microfluidics has become a very promising technology in recent years, due to its great potential to revolutionize life-science solutions. Generic microfabrication processes have been progressively made available to academic laboratories thanks to cost-effective soft-lithography techniques and enabled important progress in applications like lab-on-chip platforms using rapid- prototyping. However, micron-sized features are required in most designs, especially in biomimetic cell culture platforms, imposing elevated costs of production associated with lithography and limiting the use of such devices. In most cases, however, only a small portion of the structures require high-resolution and cost may be decreased. In this work, we present a replica-molding method separating the fabrication steps of low (macro) and high (micro) resolutions and then merging the two scales in a single chip. The method consists of fabricating the largest possible area in inexpensive macromolds using simple techniques such as plastics micromilling, laser microfabrication, or even by shrinking printed polystyrene sheets. The microfeatures were made on a separated mold or onto existing macromolds using photolithography or 2-photon lithography. By limiting the expensive area to the essential, the time and cost of fabrication can be reduced. Polydimethylsiloxane (PDMS) microfluidic chips were successfully fabricated from the constructed molds and tested to validate our micro–macro method.

CMOS-Compatible Through Silicon Vias for 3D Process Integration

2006 ◽  
Vol 970 ◽  
Author(s):  
Cornelia K. Tsang ◽  
Paul S. Andry ◽  
Edmund J. Sprogis ◽  
Chirag S. Patel ◽  
Bucknell C. Webb ◽  
...  
Keyword(s):  
Mechanical Stability ◽  
Process Integration ◽  
Three Dimensional ◽  
High Density ◽  
High Yield ◽  
Large Area ◽  
Process Flow ◽  
Through Silicon Via ◽  
Through Silicon Vias ◽  
Silicon Vias

ABSTRACTAs the limits of traditional CMOS scaling are approached, process integration has become increasingly difficult and resulting in a diminished rate of performance improvement over time. Consequently, the search for new two- and three- dimensional sub-system solutions has been pursued. One such solution is a silicon carrier-based System-on-Package (SOP) that enables high-density interconnection of heterogeneous die beyond current first level packaging densities. Silicon carrier packaging contains through silicon vias (TSV), fine pitch Cu wiring and high-density solder pads/joins, all of which are compatible with traditional semiconductor methods and tools. These same technology elements, especially the through silicon via process, also enable three dimensional stacking and integration. An approach to fabricating electrical through-vias in silicon is described, featuring annular-shaped vias instead of the more conventional cylindrical via. This difference enables large-area, uniform arrays to be produced with high yield as it is simpler to integrate into a conventional CMOS back-end-of-line (BEOL) process flow. Furthermore, the CTE-matched silicon core provides improved mechanical stability and the dimensions of the annular via allows for metallization by various means including copper electroplating or CVD tungsten deposition. An annular metal conductor process flow will be described. Through-via resistance measurements of 50, 90, and 150μm deep tungsten-filled annular vias will be compared. Two silicon carrier test vehicle designs, containing more than 2,200 and 9,600 electrical through-vias, respectively, were built to determine process yield and uniformity of via resistance. Through silicon via resistances range from 15-40 mΩ, and yields in excess of 99.99% have been demonstrated.

scholarly journals Application of Microfluidic Chips in Separation and Analysis of Extracellular Vesicles in Liquid Biopsy for Cancer

Micromachines ◽  
2019 ◽  
Vol 10 (6) ◽  
pp. 390 ◽  
Author(s):  
Jin Lu ◽  
Jiushen Pang ◽  
Ying Chen ◽  
Qi Dong ◽  
Jiahao Sheng ◽  
...  
Keyword(s):  
Extracellular Vesicles ◽  
Liquid Biopsy ◽  
Culture Medium ◽  
Microfluidic Chips ◽  
Cell Culture Medium ◽  
Single Chip ◽  
Size Dependent ◽  
On Chip ◽  
Monitoring Treatment ◽  
Chip Analysis

Extracellular vesicles (EVs) are becoming a promising biomarker in liquid biopsy of cancer. Separation EV from cell culture medium or biofluids with high purity and quality remains a technique challenge. EV manipulation techniques based on microfluidics have been developed in the last decade. Microfluidic-based EV separation techniques developed so far can be classified into two categories: surface biomarker-dependent and size-dependent approaches. Microfluidic techniques allow the integration of EV separation and analysis on a single chip. Integrated EV separation and on-chip analysis have shown great potential in cancer diagnosis and monitoring treatment of responses. In this review, we discuss the development of microfluidic chips for EV separation and analysis. We also detail the clinical application of these microfluidic chips in the liquid biopsy of various cancers.

Band Deformation at a T-Junction While Electrofocusing in a Dog-Leg Microchannel

2004 ◽  
Author(s):  
Keisuke Horiuchi ◽  
Prashanta Dutta ◽  
Huanchun Cui ◽  
Cornelius F. Ivory
Keyword(s):  
Soft Lithography ◽  
Three Dimensional ◽  
Methyl Cellulose ◽  
Microfluidic Chips ◽  
Separation And Purification ◽  
Sharp Edges ◽  
Viscous Polymer ◽  
Band Deformation ◽  
On Chip ◽  
Long Channel

On-chip isoelectric focusing (IEF) has been performed in both straight and dog-leg microchannels. Three-dimensional microfluidic chips were fabricated on poly di-methyl-siloxane (PDMS) using soft lithography and multilayer bonding techniques. Plasma oxidized PDMS channel surfaces were dynamically coated with methyl cellulose to discourage electroosmotic flow during separation and purification processes. In a straight microchannel, IEF was completed within 5 minutes at an applied electric field strength of 50 V/cm using broad range ampholytes. The focused bands were generally well-formed with sharp edges and were less than 100 microns across yielding a putative peak capacity in excess of 100 peaks in a 2-cm long channel. However, the conventional IEF protocol shifts the focused bands toward the cathodic well. This cathodic drift can be effectively minimized by placing highly viscous polymer solutions in the electrode reservoirs. In dog-leg microchannels, initially well formed focused band dispersed at the Tee-channel junction, but refocused at the dog-leg channels with relatively lower resolution.

Acoustic and Photoacoustic Inspection of Through-Silicon Vias in the GHz-Frequency Band

2017 ◽  
Author(s):  
Sebastian Brand ◽  
Michael Kögel ◽  
Frank Altmann ◽  
Ingrid DeWolf ◽  
Ahmad Khaled ◽  
...  
Keyword(s):  
Quality Assessment ◽  
Frequency Band ◽  
Process Development ◽  
Three Dimensional ◽  
Non Destructive Testing ◽  
Destructive Testing ◽  
Vertical Interconnection ◽  
Testing Techniques ◽  
Silicon Vias ◽  
Non Destructive

Abstract Through Silicon Via (TSV) is the most promising technology for vertical interconnection in novel three-dimensional chip architectures. Reliability and quality assessment necessary for process development and manufacturing require appropriate non-destructive testing techniques to detect cracks and delamination defects with sufficient penetration and imaging capabilities. The current paper presents the application of two acoustically based methods operating in the GHz-frequency band for the assessment of the integrity of TSV structures.

scholarly journals Mechanical Behavior of Hydroxyapatite-Chitosan Composite: Effect of Processing Parameters

Minerals ◽  
2021 ◽  
Vol 11 (2) ◽  
pp. 213
Author(s):  
Hamid Ait Said ◽  
Hassan Noukrati ◽  
Hicham Ben Youcef ◽  
Ayoub Bayoussef ◽  
Hassane Oudadesse ◽  
...  
Keyword(s):  
Molecular Weight ◽  
Compressive Strength ◽  
Mechanical Strength ◽  
Bone Repair ◽  
Mechanical Stability ◽  
Three Dimensional ◽  
Processing Parameters ◽  
Composite Effect ◽  
Solid Liquid ◽  
The Impact

Three-dimensional hydroxyapatite-chitosan (HA-CS) composites were formulated via solid-liquid technic and freeze-drying. The prepared composites had an apatitic nature, which was demonstrated by X-ray diffraction and Infrared spectroscopy analyses. The impact of the solid/liquid (S/L) ratio and the content and the molecular weight of the polymer on the composite mechanical strength was investigated. An increase in the S/L ratio from 0.5 to 1 resulted in an increase in the compressive strength for HA-CSL (CS low molecular weight: CSL) from 0.08 ± 0.02 to 1.95 ± 0.39 MPa and from 0.3 ± 0.06 to 2.40 ± 0.51 MPa for the HA-CSM (CS medium molecular weight: CSM). Moreover, the increase in the amount (1 to 5 wt%) and the molecular weight of the polymer increased the mechanical strength of the composite. The highest compressive strength value (up to 2.40 ± 0.51 MPa) was obtained for HA-CSM (5 wt% of CS) formulated at an S/L of 1. The dissolution tests of the HA-CS composites confirmed their cohesion and mechanical stability in an aqueous solution. Both polymer and apatite are assumed to work together, giving the synergism needed to make effective cylindrical composites, and could serve as a promising candidate for bone repair in the orthopedic field.

scholarly journals Electromechanically reconfigurable optical nano-kirigami

2021 ◽  
Vol 12 (1) ◽  
Author(s):  
Shanshan Chen ◽  
Zhiguang Liu ◽  
Huifeng Du ◽  
Chengchun Tang ◽  
Chang-Yin Ji ◽  
...  
Keyword(s):  
Near Infrared ◽  
Large Range ◽  
Three Dimensional ◽  
High Contrast ◽  
Si Substrate ◽  
High Modulation ◽  
Gold Nanostructure ◽  
Infrared Wavelengths ◽  
On Chip ◽  
Nano Electromechanical System

AbstractKirigami, with facile and automated fashion of three-dimensional (3D) transformations, offers an unconventional approach for realizing cutting-edge optical nano-electromechanical systems. Here, we demonstrate an on-chip and electromechanically reconfigurable nano-kirigami with optical functionalities. The nano-electromechanical system is built on an Au/SiO2/Si substrate and operated via attractive electrostatic forces between the top gold nanostructure and bottom silicon substrate. Large-range nano-kirigami like 3D deformations are clearly observed and reversibly engineered, with scalable pitch size down to 0.975 μm. Broadband nonresonant and narrowband resonant optical reconfigurations are achieved at visible and near-infrared wavelengths, respectively, with a high modulation contrast up to 494%. On-chip modulation of optical helicity is further demonstrated in submicron nano-kirigami at near-infrared wavelengths. Such small-size and high-contrast reconfigurable optical nano-kirigami provides advanced methodologies and platforms for versatile on-chip manipulation of light at nanoscale.

scholarly journals Comparative Study of Silk Fibroin-Based Hydrogels and Their Potential as Material for 3-Dimensional (3D) Printing

Molecules ◽  
2021 ◽  
Vol 26 (13) ◽  
pp. 3887
Author(s):  
Watcharapong Pudkon ◽  
Chavee Laomeephol ◽  
Siriporn Damrongsakkul ◽  
Sorada Kanokpanont ◽  
Juthamas Ratanavaraporn
Keyword(s):  
3D Printing ◽  
Silk Fibroin ◽  
Biomedical Applications ◽  
Mechanical Stability ◽  
Three Dimensional ◽  
Structure Stability ◽  
3 Dimensional ◽  
Critical Technology ◽  
Box Structure ◽  
High Degree

Three-dimensional (3D) printing is regarded as a critical technology in material engineering for biomedical applications. From a previous report, silk fibroin (SF) has been used as a biomaterial for tissue engineering due to its biocompatibility, biodegradability, non-toxicity and robust mechanical properties which provide a potential as material for 3D-printing. In this study, SF-based hydrogels with different formulations and SF concentrations (1–3%wt) were prepared by natural gelation (SF/self-gelled), sodium tetradecyl sulfate-induced (SF/STS) and dimyristoyl glycerophosphorylglycerol-induced (SF/DMPG). From the results, 2%wt SF-based (2SF) hydrogels showed suitable properties for extrusion, such as storage modulus, shear-thinning behavior and degree of structure recovery. The 4-layer box structure of all 2SF-based hydrogel formulations could be printed without structural collapse. In addition, the mechanical stability of printed structures after three-step post-treatment was investigated. The printed structure of 2SF/STS and 2SF/DMPG hydrogels exhibited high stability with high degree of structure recovery as 70.4% and 53.7%, respectively, compared to 2SF/self-gelled construct as 38.9%. The 2SF/STS and 2SF/DMPG hydrogels showed a great potential to use as material for 3D-printing due to its rheological properties, printability and structure stability.

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