Bulk multigate junctionless transistor (BMGJLT) with non-uniform doping profile: An attractive device for scaling

2020 ◽  
Author(s):  
Dipak Kumar Singh ◽  
Priyanka Mondal ◽  
M. W. Akram
Author(s):  
Muhammad S Ullah ◽  
Emadelden Fouad ◽  
Xhino M. Domi

The VLSI industry is facing parasitic effects that trouble development in the nanoscale domain. However, instead of replacing the traditional MOSFET design, it would be more advantageous to apply different doping profiles and discerning which deal with specific parasitic effects the best. With a review of Gaussian doping, Uniform doping, and Delta doping profiles and analysis of the FET technology characteristics that use these doping profiles, a comparison can be made among them for integrated circuit design engineers. These doping profiles are compared based on how well they perform against non-ideal and ideal environments. Also, both digital and analog performance are measured to ensure the uniqueness of each doping profile that is present. After getting a list of benefits from each doping profile, it is derived to determine which doping profile works best against a host of parasitic effects and what type of application do these doping profiles have


2015 ◽  
Vol 119 (1) ◽  
pp. 127-132 ◽  
Author(s):  
Partha Mondal ◽  
Bahniman Ghosh ◽  
Punyasloka Bal ◽  
M. W. Akram ◽  
Akshaykumar Salimath

In this paper we have presented the non-uniformly doped bulk Junctionless transistor (JLT) and investigated bulk-JLT and SOI-JLT with non-uniform doping in terms of its electrical performance parameters and short channel effects (SCEs) parameters comparatively. Effective thickness of channel depends on non-uniform doping distribution parameters and this affects the performance of bulk-JLT notably, however it is not so in case of SOI-JLT. The effect of non-uniform doping on electrical characteristics of JLTs (bulk and SOI) in terms of Subthreshold Slope (SS), ON-current, OFF-Current and ON/OFF current ratio has been investigated, and the non-uniformly doped bulk-JLT exhibits high ON/OFF ratio (109 for 20 nm Gate Length). Moreover, the non-uniformly doped bulk-JLT also shows improved short-channel effects (SCEs) parameters (such as Drain Induced Barrier Lowering, Threshold Voltage variations etc.) compared to SOI-JLT. Lastly, the effect of standard deviation, dielectric constant, substrate doping, and well biasing on the device performance are examined to further improve the performance of bulk-JLT independently.


Sign in / Sign up

Export Citation Format

Share Document