Effect of gate oxide thickness on the performance of rectangular core-shell based junctionless field effect transistor

2020 ◽  
Author(s):  
Vishal Narula ◽  
Mohit Agarwal
2021 ◽  
Vol 11 (2) ◽  
pp. 1549-1566
Author(s):  
Morupuri Satish Kumar Reddy

Aim: The current and voltage characteristics of CNTFET and MOSFET are simulated by varying their gate oxide thickness ranging from 3.5nm to 11.5nm. Materials and Methods: The electrical conductance of CNTFET (n = 320) was compared with MOSFET (n = 320) by varying gate oxide thickness ranging from 3.5nm to 11.5nm in the NanoHUB© tool simulation environment. Results: CNTFET has significantly higher conductance (12.52 mho) than MOSFET (12.07 mho). The optimal thickness for maximum conductivity was 4nm for CNTFET and 3.5 nm for MOSFET. Conclusion: Within the limits of this study, CNTFET with the gate oxide thickness of 4 nm offers the best conductivity.


2000 ◽  
Vol 10 (01) ◽  
pp. 231-245 ◽  
Author(s):  
SANDIP TIWARI ◽  
A. KUMAR ◽  
J. J. WELSER

For transistor, the limit of usable field-effect is defined by tunneling between the source and the drain - the mechanism that competes with field-effect as device dimensions shrink to near deBroglie wavelength. This is a more fundamental constraint in the operation of a field-effect transistor than random dopants, oxide thickness, doping magnitudes and depth, gate resistivity, soft-error rates, etc. We describe here a MOSFET structure, the straddle-gate transistor, that uses inversion regions as virtual source and drain, operates within the limits placed by the other constraints, and operates at acceptable power levels with good power gain and output conductance at 10 nm channel lenth. Experimental behavior of the straddle geometry are also described to summarized the advantages accrued using electron injection from the thin inversion regions.


2019 ◽  
Vol 66 (6) ◽  
pp. 2809-2816 ◽  
Author(s):  
Gaurav Musalgaonkar ◽  
Shubham Sahay ◽  
Raghvendra Sahai Saxena ◽  
Mamidala Jagadesh Kumar

2020 ◽  
Vol 10 (7) ◽  
pp. 2499 ◽  
Author(s):  
Namrata Mendiratta ◽  
Suman Lata Tripathi ◽  
Sanjeevikumar Padmanaban ◽  
Eklas Hossain

The Complementary Metal-Oxide Semiconductor (CMOS) technology has evolved to a great extent and is being used for different applications like environmental, biomedical, radiofrequency and switching, etc. Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) based biosensors are used for detecting various enzymes, molecules, pathogens and antigens efficiently with a less time-consuming process involved in comparison to other options. Early-stage detection of disease is easily possible using Field-Effect Transistor (FET) based biosensors. In this paper, a steep subthreshold heavily doped n+ pocket asymmetrical junctionless MOSFET is designed for biomedical applications by introducing a nanogap cavity region at the gate-oxide interface. The nanogap cavity region is introduced in such a manner that it is sensitive to variation in biomolecules present in the cavity region. The analysis is based on dielectric modulation or changes due to variation in the bio-molecules present in the environment or the human body. The analysis of proposed asymmetrical junctionless MOSFET with nanogap cavity region is carried out with different dielectric materials and variations in cavity length and height inside the gate–oxide interface. Further, this device also showed significant variation for changes in different introduced charged particles or region materials, as simulated through a 2D visual Technology Computer-Aided Design (TCAD) device simulator.


2016 ◽  
Vol 16 (3) ◽  
pp. 300-304 ◽  
Author(s):  
Chanjong Ju ◽  
Chulkwon Park ◽  
Hyeonseok Yang ◽  
Useong Kim ◽  
Young Mo Kim ◽  
...  

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