Kinetics of solid phase crystallization of amorphous silicon analyzed by Raman spectroscopy

2013 ◽  
Vol 114 (7) ◽  
pp. 073511 ◽  
Author(s):  
Won-Eui Hong ◽  
Jae-Sang Ro
Keyword(s):  
Raman Spectroscopy ◽  
Amorphous Silicon ◽  
Solid Phase ◽  
Solid Phase Crystallization ◽  
Kinetics Of

Kinetics and Mechanisms of Solid Phase Epitaxy and Competitive Processes in Silicon

1984 ◽  
Vol 35 ◽  
Author(s):  
G.L. Olson
Keyword(s):  
Amorphous Silicon ◽  
Epitaxial Growth ◽  
Recent Progress ◽  
Solid Phase ◽  
Solid Phase Epitaxy ◽  
Temperature Dependent ◽  
Solid Phase Crystallization ◽  
Induced Changes ◽  
Kinetics Of ◽  
Very High

ABSTRACTRecent progress in studies of temperature dependent kinetic competition during solid phase crystallization of silicon is reviewed. Specific areas which are emphasized include: the enhancement of solid phase epitaxial growth rates by impurity-induced changes in electronic properties at the crystal/amorphous interface, the influence of impurity diffusion and precipitation in amorphous silicon on the kinetics of epitaxial growth, the effects of impurities on the kinetic competition between solid phase epitaxy and random crystallization, and the kinetics of solid phase crystallization at very high temperatures in silicon.

Combinatorial Studies of Switching and Solid-Phase Crystallization in Amorphous Silicon

2005 ◽  
Vol 894 ◽  
Author(s):  
Paul Stradins ◽  
Howard M. Branz ◽  
Jian Hu ◽  
Scott Ward ◽  
Qi Wang
Keyword(s):  
Thin Film ◽  
Film Thickness ◽  
Amorphous Silicon ◽  
Solid Phase ◽  
Reverse Current ◽  
Solid Phase Epitaxy ◽  
Solid Phase Crystallization ◽  
Metallic Contacts ◽  
Image Monitoring ◽  
Kinetics Of

AbstractCombinatorial approaches are successfully applied for the optimization of electric write-once, thin-film Si antifuse memory devices, as well as for studying the solid-phase epitaxy kinetics of amorphous silicon on c-Si. High forward, low reverse current thin film Si diode deposition recipes are selected using cross-strips of different combinations of amorphous and microcrystalline doped layers, as well as a thickness-wedged intrinsic a-Si:H buffer layer. By studying switching in thickness-wedged a-Si:H layers, it is found that switching requires both a critical field and a critical bias voltage across the metallic contacts. Solid-phase epitaxy speed has a non-linear dependence on the film thickness, which is easily observed by optical image monitoring and analysis in wedged a-Si:H films on c-Si wafers.

Ge-rich Si1-XGeX Nanocrystal Formation by the Oxidation of As-Deposited Thin Amorphous Si0.7Ge0.3 Layer

2002 ◽  
Vol 727 ◽  
Author(s):  
Tae-Sik Yoon ◽  
Ki-Bum Kim
Keyword(s):  
Selective Oxidation ◽  
Oxidation Rate ◽  
Solid Phase ◽  
Amorphous Film ◽  
Alloy Film ◽  
Spatial Density ◽  
Solid Phase Crystallization ◽  
Higher Temperature ◽  
20 Nm ◽  
Kinetics Of

AbstractGe-rich Si1-XGeX nanocrystals are formed by the selective oxidation of Si during the dry oxidation of an amorphous Si0.7Ge0.3 layer. The oxidation kinetics of the alloy film shows the activation energies of linear and parabolic rate constants are about 1.35 and 1.02 eV, respectively, based on the model proposed by Deal and Grove. In addition, as a result of the selective oxidation of Si and Ge pile-up during the oxidation process, Ge-rich Si1-XGeX nanocrystals are formed with the size of 5.6 ± 1.7 nm and the spatial density of 3.6×1011/cm2 at 600°C. At higher temperature of 700 and 800°C, the size of nanocrystal is increased to about 20 nm. The nanocrystals formation by oxidation is thought to be due to higher oxidation rate at grain boundary than at bulk grain. Therefore, the dependence of size on temperature is explained with the grain size determined by solid phase crystallization of amorphous film, oxidation rate, and grain growth.

Stress Induced During the Solid-phase Crystallization of Amorphous Silicon Deposited by LPCVD

1995 ◽  
Vol 403 ◽  
Author(s):  
T. Mohammed-Brahim ◽  
K. Kis-Sion ◽  
D. Briand ◽  
M. Sarret ◽  
F. Lebihan ◽  
...  
Keyword(s):  
Amorphous Silicon ◽  
Solid Phase ◽  
Chemical Vapor ◽  
In Situ Monitoring ◽  
Crystallization Time ◽  
Solid Phase Crystallization ◽  
Pressure Chemical ◽  
Hall Effect Measurements ◽  
Deposition Techniques

AbstractThe Solid Phase Crystallization (SPC) of amorphous silicon films deposited by Low Pressure Chemical Vapor phase Deposition (LPCVD) using pure silane at 550'C was studied by in-situ monitoring the film conductance. The saturation of the conductance at the end of the crystallization process is found transient. The conductance decreases slowly after the onset of the saturation. This degradation is also observed from other analyses such as ellipsometry spectra, optical transmission and Arrhenius plots of the conductivity between 250 and 570K. Hall effect measurements show that the degradation is due to a decrease of the free carrier concentration n and not to a decrease of the mobility. This indicates a constant barrier height at the grain boundaries. The decrease of n is then due to a defect creation in the grain. Hence, whatever the substrate used, an optimum crystallization time exists. It depends on the amorphous quality film which is determined by the deposition techniques and conditions and on the crystallization parameters.

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