Comparison of boron precipitation in p-type bulk nanostructured and polycrystalline silicon germanium alloy

2013 ◽  
Vol 113 (14) ◽  
pp. 143715 ◽  
Author(s):  
Zahra Zamanipour ◽  
Jerzy S. Krasinski ◽  
Daryoosh Vashaee
2002 ◽  
Vol 729 ◽  
Author(s):  
Roger T. Howe ◽  
Tsu-Jae King

AbstractThis paper describes recent research on LPCVD processes for the fabrication of high-quality micro-mechanical structures on foundry CMOS wafers. In order to avoid damaging CMOS electronics with either aluminum or copper metallization, the MEMS process temperatures should be limited to a maximum of 450°C. This constraint rules out the conventional polycrystalline silicon (poly-Si) as a candidate structural material for post-CMOS integrated MEMS. Polycrystalline silicon-germanium (poly-SiGe) alloys are attractive for modular integration of MEMS with electronics, because they can be deposited at much lower temperatures than poly-Si films, yet have excellent mechanical properties. In particular, in-situ doped p-type poly-SiGe films deposit rapidly at low temperatures and have adequate conductivity without post-deposition annealing. Poly-Ge can be etched very selectively to Si, SiGe, SiO2 and Si3N4 in a heated hydrogen peroxide solution, and can therefore be used as a sacrificial material to eliminate the need to protect the CMOS electronics during the MEMS-release etch. Low-resistance contact between a structural poly-SiGe layer and an underlying CMOS metal interconnect can be accomplished by deposition of the SiGe onto a typical barrier metal exposed in contact windows. We conclude with directions for further research to develop poly-SiGe technology for integrated inertial, optical, and RF MEMS applications.


2012 ◽  
Vol 209 (10) ◽  
pp. 2049-2058 ◽  
Author(s):  
Zahra Zamanipour ◽  
Xinghua Shi ◽  
Arash M. Dehkordi ◽  
Jerzy S. Krasinski ◽  
Daryoosh Vashaee

2016 ◽  
Vol 703 ◽  
pp. 70-75 ◽  
Author(s):  
Zhen Ye Zhu ◽  
Shi Lei Guo

High dense p-type Si95Ge5 doped with nanoSi70Ge30B5particles thermoelectric materials were firstly fabricated by mechanical alloying (MA) and spark plasma sintering (SPS) method. The effects of different nanoSi70Ge30B5 doping content on the thermoelectric and phase properties were studied. A dimensionless thermoelectric figure-of-merit (ZT) of 0.47 at 710K in p-type nanocomposite bulk silicon germanium (SiGe) alloys is achieved. The enhancement of ZT is due to a large reduction of thermal conductivity caused by the increased grain boundaries of the numerous nanograins that effectively scatter long wavelength phonons.


Author(s):  
H. Yen ◽  
E. P. Kvam ◽  
R. Bashir ◽  
S. Venkatesan ◽  
G. W. Neudeck

Polycrystalline silicon, when highly doped, is commonly used in microelectronics applications such as gates and interconnects. The packing density of integrated circuits can be enhanced by fabricating multilevel polycrystalline silicon films separated by insulating SiO2 layers. It has been found that device performance and electrical properties are strongly affected by the interface morphology between polycrystalline silicon and SiO2. As a thermal oxide layer is grown, the poly silicon is consumed, and there is a volume expansion of the oxide relative to the atomic silicon. Roughness at the poly silicon/thermal oxide interface can be severely deleterious due to stresses induced by the volume change during oxidation. Further, grain orientations and grain boundaries may alter oxidation kinetics, which will also affect roughness, and thus stress.Three groups of polycrystalline silicon films were deposited by LPCVD after growing thermal oxide on p-type wafers. The films were doped with phosphorus or arsenic by three different methods.


1988 ◽  
Author(s):  
J.P. Conde ◽  
V. Chu ◽  
S. Tanaka ◽  
D.S. Shen ◽  
S. Wagner

1987 ◽  
Vol 106 ◽  
Author(s):  
Mark S. Rodder ◽  
Dimitri A. Antoniadis

ABSTRACTIt is shown that the grain boundary (GB) in polycrystalline-silicon (poly-Si) films need not be modeled as a temperature-dependent potential barrier or as an amorphous region to explain the temperature (T) dependence of resistivity (ρ) in p-type poly-Si films at low T. Specifically, we consider that QB defect states allow for the tunneling component of current to occur by a two-step process. Incorporation of the two-step process in a numerical calculation of ρ vs. T results in excellent agreement with available data from 100 K to 300 K.


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