Short channel effects on gallium nitride/gallium oxide nanowire transistors

2012 ◽  
Vol 101 (18) ◽  
pp. 183501 ◽  
Author(s):  
J.-W. Yu ◽  
P.-C. Yeh ◽  
S.-L. Wang ◽  
Y.-R. Wu ◽  
M.-H. Mao ◽  
...  
Author(s):  
P. Razavi ◽  
N. Dehdashti Akhavan ◽  
R. Yu ◽  
G. Fagas ◽  
I. Ferain ◽  
...  

2013 ◽  
Vol 8 (2) ◽  
pp. 116-124
Author(s):  
Renan D. Trevisoli ◽  
Rodrigo T. Doria ◽  
Michelly De Souza ◽  
Marcelo Antonio Pavanello

Junctionless nanowire transistors (JNTs) are considered promising for the sub-20 nm era, since they provide a great scalability without the need for rigorously controlled doping techniques. In this work, the modeling of triple-gate JNTs is addressed, focusing on the short-channel effects. Analytical expressions for the subthreshold slope, threshold voltage roll-off and drain induced barrier lowering are presented. The model is validated using tridimensional numerical simulations.


2012 ◽  
Vol 49 (1) ◽  
pp. 207-214 ◽  
Author(s):  
R. D. Trevisoli ◽  
R. T. Doria ◽  
M. de Souza ◽  
M. A. Pavanello

1993 ◽  
Vol 3 (9) ◽  
pp. 1719-1728
Author(s):  
P. Dollfus ◽  
P. Hesto ◽  
S. Galdin ◽  
C. Brisset

2007 ◽  
Vol 54 (8) ◽  
pp. 1943-1952 ◽  
Author(s):  
A. Tsormpatzoglou ◽  
C.A. Dimitriadis ◽  
R. Clerc ◽  
Q. Rafhay ◽  
G. Pananakakis ◽  
...  

1989 ◽  
Vol 36 (3) ◽  
pp. 522-528 ◽  
Author(s):  
S. Veeraraghavan ◽  
J.G. Fossum

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