Performance improvement of phase change memory cell by using a cerium dioxide buffer layer

2010 ◽  
Vol 96 (20) ◽  
pp. 203504 ◽  
Author(s):  
Fei Shang ◽  
Jiwei Zhai ◽  
Sannian Song ◽  
Zhitang Song ◽  
Changzhou Wang
Keyword(s):  
Phase Change ◽  
Buffer Layer ◽  
Performance Improvement ◽  
Cerium Dioxide ◽  
Phase Change Memory ◽  
Memory Cell ◽  
Change Memory

Performance Improvement of Phase Change Memory Cell by Using a Tantalum Pentoxide Buffer Layer

2016 ◽  
Vol 848 ◽  
pp. 425-429
Author(s):  
Zhong Hua Zhang ◽  
San Nian Song ◽  
Zhi Tang Song ◽  
Le Li ◽  
Lan Lan Shen ◽  
...  
Keyword(s):  
Phase Change ◽  
Buffer Layer ◽  
Performance Improvement ◽  
Phase Change Memory ◽  
Memory Cell ◽  
Tantalum Pentoxide ◽  
Reset Voltage ◽  
Clad Layer ◽  
Improved Performance ◽  
Change Memory

The performance of phase change memory (PCM) cell, based on Ti0.5Sb2Te3, was significantly improved by using a tantalum dioxide buffer layer. The presence of a buffer layer reduced the reset voltage of the PCM cell. The theoretical thermal simulation and calculation for the reset process were conducted to analyze the thermal effect of the titanium dioxide heating layer. The improved performance of the PCM cell with dioxide clad layer can be attributed to the fact that the buffer layer not only acted as heating layer but also efficiently reduced the cell dissipated power.

Performance improvement of phase-change memory cell with Ge2Sb2Te5-HfO2 composite films

2010 ◽  
Vol 99 (4) ◽  
pp. 767-770 ◽  
Author(s):  
Sannian Song ◽  
Zhitang Song ◽  
Bo Liu ◽  
Liangcai Wu ◽  
Songlin Feng
Keyword(s):  
Phase Change ◽  
Performance Improvement ◽  
Composite Films ◽  
Phase Change Memory ◽  
Memory Cell ◽  
Change Memory

Performance improvement of phase-change memory cell with cup-shaped bottom electrode contact

2008 ◽  
Vol 93 (10) ◽  
pp. 103107 ◽  
Author(s):  
L. C. Wu ◽  
Z. T. Song ◽  
F. Rao ◽  
Y. F. Gong ◽  
B. Liu ◽  
...  
Keyword(s):  
Phase Change ◽  
Performance Improvement ◽  
Bottom Electrode ◽  
Phase Change Memory ◽  
Memory Cell ◽  
Electrode Contact ◽  
Change Memory

Study of phase change memory cell with inserting buffer layer

2010 ◽  
pp. NA-NA
Author(s):  
Liangcai Wu ◽  
Xilin Zhou ◽  
Zhitang Song ◽  
Yan Liu ◽  
Henan Ni ◽  
...  
Keyword(s):  
Phase Change ◽  
Buffer Layer ◽  
Phase Change Memory ◽  
Memory Cell ◽  
Change Memory

A SPICE model for a phase-change memory cell based on the analytical conductivity model

2012 ◽  
Vol 33 (11) ◽  
pp. 114004
Author(s):  
Yiqun Wei ◽  
Xinnan Lin ◽  
Yuchao Jia ◽  
Xiaole Cui ◽  
Jin He ◽  
...  
Keyword(s):  
Phase Change ◽  
Phase Change Memory ◽  
Memory Cell ◽  
Conductivity Model ◽  
Spice Model ◽  
Change Memory

Simulation and Design of a Silicon Nanowire based Phase Change Memory Cell

2012 ◽  
Vol 1431 ◽  
Author(s):  
Ramin Banan Sadeghian ◽  
Yusuf Leblebici ◽  
Ali Shakouri
Keyword(s):  
Phase Change ◽  
High Speed ◽  
Low Cost ◽  
Silicon Nanowire ◽  
Phase Change Memory ◽  
Random Access ◽  
Memory Cell ◽  
Oxide Thickness ◽  
Nanowire Diameter ◽  
Change Memory

ABSTRACTIn this work we present preliminary calculations and simulations to demonstrate feasibility of programming a nanoscale Phase Change Random Access Memory (PCRAM) cell by means of a silicon nanowire ballistic transistor (SNWBT). Memory cells based on ballistic transistors bear the advantage of having a small size and high-speed operation with low power requirements. A one-dimensional MOSFET model (FETToy) was used to estimate the output current of the nanowire as a function of its diameter. The gate oxide thickness was 1.5 nm, and the Fermi level at source was set to -0.32 eV. For the case of VDS = VGS = 1 V, when the nanowire diameter was increased from 1 to 60 nm, the output power density dropped from 109 to 106 W cm-2 , while the current increased from 20 to 90 μA. Finite element electro-thermal analysis were carried out on a segmented cylindrical phase-change memory cell made of Ge2Sb2Te5 (GST) chalcogenide, connected in series to the SNWBT. The diameter of the combined device, d, and the aspect ratio of the GST region were selected so as to achieve optimum heating of the GST. With the assumption that the bulk thermal conductivity of GST does not change significantly at the nanoscale, it was shown that for d = 24 nm, a ‘reset’ programming current of ID = 80 μA can heat the GST up to its melting point. The results presented herein can help in the design of low cost, high speed, and radiation tolerant nanoscale PCRAM devices.

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