Microwave spectroscopic measurement of the electron density in a planar discharge: Relation to reactive‐ion etching of silicon oxide

1985 ◽  
Vol 57 (9) ◽  
pp. 4386-4390 ◽  
Author(s):  
C. A. M. de Vries ◽  
A. J. van Roosmalen ◽  
G. C. C. Puylaert
Keyword(s):  
Electron Density ◽  
Silicon Oxide ◽  
Reactive Ion Etching ◽  
Spectroscopic Measurement ◽  
Ion Etching

Electron Beam Induced Current Imaging of Silicon Oxide Damage Due to Reactive Ion Etching

1996 ◽  
Vol 51-52 ◽  
pp. 359-366
Author(s):  
Hary Kirk ◽  
Zbigniew J. Radzimski ◽  
A. Romanowski ◽  
George A. Rozgonyi
Keyword(s):  
Electron Beam ◽  
Silicon Oxide ◽  
Reactive Ion Etching ◽  
Induced Current ◽  
Ion Etching ◽  
Electron Beam Induced Current ◽  
Oxide Damage

Silicon CMOS BEOL Compatible Optical Waveguide Micro-mirrors

2002 ◽  
Vol 744 ◽  
Author(s):  
Shom Ponoth ◽  
Navnit Agarwal ◽  
Peter Persans ◽  
Joel Plawsky
Keyword(s):  
Refractive Index ◽  
Optical Waveguides ◽  
Silicon Oxide ◽  
Reactive Ion Etching ◽  
Plasma Chemistry ◽  
Planar Waveguides ◽  
Ion Etching ◽  
Polymer Waveguide ◽  
Sidewall Angle ◽  
On Chip

ABSTRACTOptical waveguides are being explored for on-chip purposes to overcome the speed limitations of electrical interconnects. Passive optical components like waveguides and vertical outcouplers are important components in such schemes. In this study we fabricate planar waveguides with integrated vertical micro-mirrors using standard Back End of the Line silicon (BEOL) CMOS based processes. Around 1.6 μm of a hybrid alkoxy siloxane polymer with a refractive index of ∼ 1.50 at the intended wavelength of 830 nm is used as the core and plasma deposited silicon oxide with a refractive index of ∼ 1.46 is used as the cladding. The angular face in the polymer waveguide that would function as the mirror surface was fabricated by a pattern transfer method which involves transferring the angle in a template to the waveguide using anisotropic reactive ion etching. The sidewall angle realized in a positive resist on patterning was used as the angle template. Exposure and development conditions were adjusted for Shipley® S1813 photoresist to generate a sidewall angle of ∼ 65°. The anisotropic Reactive Ion Etching (RIE) was done using a CF4/O2 plasma chemistry. A gas composition of 50/50 CF4/O2 was chosen in order to minimize the etch related roughness of the polymer and the photoresist. The metallization of the mirror faces was done using a self-aligned maskless technique which ensures metal deposition only on the angular face and also eliminates a lithography step.

Etching characteristics of NF3 and F3NO at reactive ion etching plasma for silicon oxide and silicon nitride

2021 ◽  
Author(s):  
Woo Jae Kim ◽  
In Young Bang ◽  
Ji Hwan Kim ◽  
Yeon Soo Park ◽  
Hee Tae Kwon ◽  
...  
Keyword(s):  
Silicon Nitride ◽  
Silicon Oxide ◽  
Reactive Ion Etching ◽  
Ion Etching

Silicon near-surface damage induced by reactive ion etching

1987 ◽  
Vol 45 ◽  
pp. 244-245
Author(s):  
S. J. Jeng ◽  
G. S. Oehrlein
Keyword(s):  
Silicon Oxide ◽  
Reactive Ion Etching ◽  
Complete Removal ◽  
Surface Damage ◽  
High Resolution Electron Microscopy ◽  
Ion Etching ◽  
Near Surface ◽  
Ion Channeling ◽  
Resolution Electron ◽  
Polysilicon Films

Reactive ion etching (RIE) is an anisotropic etching process which has been used to etch silicon oxide, silicon nitride and polysilicon films. Due to the nonuniformities of etch rate and film thickness, overetching is often required to ensure the complete removal of these films. Previous X-ray photoemission spectroscopy (XPS), He ion channeling, nuclear reaction profiling, Raman scattering and ellipsometry studies have indicated the presence of a fluorocarbon film (30-40 Å) on Si, a heavily disordered layer (∼30 Å) and the etching gas related impurity implantation region (∼250 Å) underneath the Si surface caused by CF4/x% H2 (0≤x≤40) reactive ion etching. In the present investigation, high resolution electron microscopy (HREM) is used to study the structures and distribution of lattice defects in the heavily disordered region. Particular attention is paid to the effects of overetch time and hydrogen addition to CF4 etching gas on Si near-surface damage structures.

scholarly journals Cyclic photochemical re-growth of gold nanoparticles: Overcoming the mask-erosion limit during reactive ion etching on the nanoscale

2013 ◽  
Vol 4 ◽  
pp. 886-894 ◽  
Author(s):  
Burcin Özdemir ◽  
Axel Seidenstücker ◽  
Alfred Plettl ◽  
Paul Ziemann
Keyword(s):  
Silicon Oxide ◽  
Reactive Ion Etching ◽  
Ion Etching ◽  
Photochemical Process ◽  
Au Nps ◽  
Ordered Arrays ◽  
Aspect Ratios ◽  
Copolymer Micelle ◽  
Hexagonally Ordered ◽  
The Given

The basic idea of using hexagonally ordered arrays of Au nanoparticles (NP) on top of a given substrate as a mask for the subsequent anisotropic etching in order to fabricate correspondingly ordered arrays of nanopillars meets two serious obstacles: The position of the NP may change during the etching process and, thus, the primary pattern of the mask deteriorates or is completely lost. Furthermore, the NP are significantly eroded during etching and, consequently, the achievable pillar height is strongly restricted. The present work presents approaches on how to get around both problems. For this purpose, arrays of Au NPs (starting diameter 12 nm) are deposited on top of silica substrates by applying diblock copolymer micelle nanolithography (BCML). It is demonstrated that evaporated octadecyltrimethoxysilane (OTMS) layers act as stabilizer on the NP position, which allows for an increase of their size up to 50 nm by an electroless photochemical process. In this way, ordered arrays of silica nanopillars are obtained with maximum heights of 270 nm and aspect ratios of 5:1. Alternatively, the NP position can be fixed by a short etching step with negligible mask erosion followed by cycles of growing and reactive ion etching (RIE). In that case, each cycle is started by photochemically re-growing the Au NP mask and thereby completely compensating for the erosion due to the previous cycle. As a result of this mask repair method, arrays of silica nanopillar with heights up to 680 nm and aspect ratios of 10:1 are fabricated. Based on the given recipes, the approach can be applied to a variety of materials like silicon, silicon oxide, and silicon nitride.

DEEP REACTIVE ION ETCHING FOR PILLAR TYPE NANOPHOTONIC CRYSTAL

2005 ◽  
Vol 04 (04) ◽  
pp. 567-574 ◽  
Author(s):  
SELIN H. G. TEO ◽  
A. Q. LIU ◽  
G. L. SIA ◽  
C. LU ◽  
J. SINGH ◽  
...  
Keyword(s):  
Silicon Oxide ◽  
Reactive Ion Etching ◽  
Gas Flows ◽  
Two Dimensional ◽  
Ion Etching ◽  
Deep Reactive Ion Etching ◽  
Deep Uv ◽  
The Many ◽  
Two Dimensional Photonic Crystal

Experimental results and techniques developed for time multiplexed deep reactive ion etching of nano-photonic crystals are presented. Specifically, the high aspect ratio pillar type two-dimensional photonic crystal (PhC) structure on silicon is fabricated and studied for its high potential in application to lightwave circuits and also for discussion of the many unique challenges involved in its fabrication process as opposed to standard larger scale devices. In the experiments, patterns of nano-dots were first obtained using deep UV lithography and transferred to a silicon oxide hardmask prior to DRIE processing. The iteration of DRIE experiments with varying process parameters then allowed for a characterization of the varying impact of each etching parameter such as coil/ platen/ etch power, multiplexing cycling gas flows and timing patterns etc. After much optimization of sidewall etch angle and also reduction of the scalloping effect, the latest result obtained for such nano-pillar type PhC designed for application in communication is derived to have a high AR of 33.

Silicon Carbide Vertical JFET with Self-Aligned Nickel Silicide Contacts

2011 ◽  
Vol 679-680 ◽  
pp. 670-673 ◽  
Author(s):  
Konstantin Vassilevski ◽  
Irina P. Nikitina ◽  
Alton B. Horsfall ◽  
Nicolas G. Wright ◽  
Andrew J. Smith ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
Thermal Oxidation ◽  
Silicon Oxide ◽  
Reactive Ion Etching ◽  
Nickel Silicide ◽  
Gate Leakage ◽  
Leakage Currents ◽  
Ion Etching ◽  
Mesa Structure

Trenched implanted vertical JFETs (TI-VJFETs) with self-aligned gate and source contacts were fabricated on commercial 4H-SiC epitaxial wafers. Gate regions were formed by aluminium implantation through the same silicon oxide mask which was used for etching mesa-structures. Self-aligned nickel silicide source and gate contacts were formed using a silicon oxide spacer formed on mesa-structure sidewalls by anisotropic thermal oxidation of silicon carbide followed by anisotropic reactive ion etching of oxide. Fabricated normally-on 4H-SiC TI-VJFETs demonstrated low gate leakage currents and blocking voltages exceeding 200 V.

Native Oxide Growth on Silicon Micro-Pillars

2017 ◽  
Vol 15 ◽  
pp. 1-9
Author(s):  
Amal Kabalan
Keyword(s):  
Outer Layer ◽  
Chemical Etching ◽  
Silicon Oxide ◽  
Reactive Ion Etching ◽  
Native Oxide ◽  
Oxide Growth ◽  
Sem Images ◽  
Ion Etching ◽  
Metal Assisted Chemical Etching ◽  
Micro Pillars

This paper presents a study on monitoring the native oxide growth on silicon micro-pillars. It also presents a comparison between the rates of oxide growth on pillars fabricated using the reactive ion etching (RIE) approach and the metal assisted chemical etching (MACE) approach. The native oxide growth is monitored using photoluminescence (PL) measurements. PL measurements showed that native silicon oxide grows at a higher rate on MACE pillars compared to RIE pillars. SEM images showed that the MACE pillars exhibit a porous outer layer while the RIE pillars show a dense outer layer. It is concluded that the porosity of the pillars enhances the native oxide growth.

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