Stone–Wales defects created by low energy recoils in single-walled silicon carbide nanotubes

2009 ◽  
Vol 106 (8) ◽  
pp. 084305 ◽  
Author(s):  
Zhiguo Wang ◽  
Fei Gao ◽  
Jingbo Li ◽  
Xiaotao Zu ◽  
William J. Weber
Keyword(s):  
Silicon Carbide ◽  
Low Energy ◽  
Silicon Carbide Nanotubes

Argon incorporation and silicon carbide formation during low energy argon‐ion bombardment of Si(100)

1996 ◽  
Vol 79 (6) ◽  
pp. 2934-2941 ◽  
Author(s):  
J. S. Pan ◽  
A. T. S. Wee ◽  
C. H. A. Huan ◽  
H. S. Tan ◽  
K. L. Tan
Keyword(s):  
Silicon Carbide ◽  
Ion Bombardment ◽  
Low Energy ◽  
Carbide Formation ◽  
Argon Ion Bombardment ◽  
Argon Ion

scholarly journals Effect of Heating Duration on the Synthesis of Silicon Carbide Nanotubes by Microwave Heating of MWCNTs and Silica

2017 ◽  
Vol 46 (7) ◽  
pp. 1069-1074
Author(s):  
Chung Sung Tony Voo ◽  
Chun Hong Voon ◽  
Chang Chuan Lee ◽  
Subash C.B. Gopinath ◽  
Bee Ying Lim ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
Microwave Heating ◽  
Silicon Carbide Nanotubes ◽  
Heating Duration

Improving Mechanical Strength and Surface Uniformity to Prepare High Quality Thinned 4H-SiC Epitaxial Wafer Using Si-Vapor Etching Technology

2017 ◽  
Vol 897 ◽  
pp. 375-378 ◽  
Author(s):  
Satoshi Torimi ◽  
Koji Ashida ◽  
Norihito Yabuki ◽  
Masato Shinohara ◽  
Takuya Sakaguchi ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
Mechanical Strength ◽  
Chemical Etching ◽  
Imaging Technique ◽  
Low Energy ◽  
Indentation Hardness ◽  
High Quality ◽  
Surface Step ◽  
Low Energy Electron ◽  
Sic Wafer

As a new thinning and surface planarizing process of Silicon Carbide (SiC) wafer, we propose the completely thermal-chemical etching process; Si-vapor etching (Si-VE) technology. In this work, the effects of mechanical strength and surface step-terrace structure by Si-VE are investigated on the 4° off-axis 4H-SiC (0001) Si-face substrates. The indentation hardness of Si-VE surface is superior to the conventional chemo-mechanical polishing (CMP) surface even after epitaxial growth. The transverse strength of thinned Si-VE substrate is also superior to the conventional mechanically ground substrate. The surface step-terrace structures are observed by the low energy electron channeling contrast (LE-ECC) imaging technique. The latent scratch causes bunched step lines (BSLs) with various inhomogeneous step morphologies only on the CMP surface.

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