Interfacial self-cleaning in atomic layer deposition of HfO2 gate dielectric on In0.15Ga0.85As

2006 ◽  
Vol 89 (24) ◽  
pp. 242911 ◽  
Author(s):  
C.-H. Chang ◽  
Y.-K. Chiou ◽  
Y.-C. Chang ◽  
K.-Y. Lee ◽  
T.-D. Lin ◽  
...  
2018 ◽  
Vol 924 ◽  
pp. 490-493 ◽  
Author(s):  
Muhammad I. Idris ◽  
Nick G. Wright ◽  
Alton B. Horsfall

3-Dimensional 4H-SiC metal-oxide-semiconductor capacitors have been fabricated to determine the effect of the sidewall on the characteristics of 3-Dimentional gate structures. Al2O3 deposited by Atomic Layer Deposition (ALD) was used as the gate dielectric layer on the trench structure. The 3-D MOS capacitors exhibit increasing accumulation capacitance with excellent linearity as the sidewall area increases, indicating that ALD results in a highly conformal dielectric film. The capacitance – voltage characteristics also show evidence of a second flatband voltage, located at a higher bias than that seen for purely planar devices on the same sample. We also observe that the oxide capacitance of planar and 3-D MOS capacitors increases with temperature. Finally, we have found that the 3-D MOS capacitor has a weaker temperature dependence of flatband voltage in comparison to the conventional planar MOS capacitor due to the incorporation of the (1120) plane in the sidewall.


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