scholarly journals Low-voltage polymer thin-film transistors with a self-assembled monolayer as the gate dielectric

2005 ◽  
Vol 87 (24) ◽  
pp. 243509 ◽  
Author(s):  
Yeong Don Park ◽  
Do Hwan Kim ◽  
Yunseok Jang ◽  
Minkyu Hwang ◽  
Jung Ah Lim ◽  
...  
RSC Advances ◽  
2019 ◽  
Vol 9 (53) ◽  
pp. 30715-30719 ◽  
Author(s):  
Wei Dou ◽  
Yuanyuan Tan

Ultralow-voltage (0.8 V) thin-film transistors (TFTs) using self-assembled indium-tin-oxide (ITO) as the semiconducting layer and microporous SiO2 immersed in 5% H3PO4 for 30 minutes with huge electric-double-layer (EDL) capacitance as the gate dielectric are fabricated at room temperature.


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