Size, shape, and ordering of SiGe/Si(001) islands grown by means of liquid phase epitaxy under far-nonequilibrium growth conditions

2005 ◽  
Vol 86 (14) ◽  
pp. 142101 ◽  
Author(s):  
M. Hanke ◽  
T. Boeck ◽  
A.-K. Gerlitzke ◽  
F. Syrowatka ◽  
F. Heyroth ◽  
...  
Author(s):  
N.A. Bert ◽  
A.O. Kosogov

The very thin (<100 Å) InGaAsP layers were grown not only by molecular beam epitaxy and metal-organic chemical vapor deposition but recently also by simple liquid phase epitaxy (LPE) technique. Characterization of their thickness, interfase abruptness and lattice defects is important and requires TEM methods to be used.The samples were InGaAsP/InGaP double heterostructures grown on (111)A GaAs substrate. The exact growth conditions are described in Ref.1. The salient points are that the quarternary layers were being grown at 750°C during a fast movement of substrate and a convection caused in the melt by that movement was eliminated. TEM cross-section specimens were prepared by means of conventional procedure. The studies were conducted in EM 420T and JEM 4000EX instruments.The (200) dark-field cross-sectional imaging is the most appropriate TEM technique to distinguish between individual layers in 111-v semiconductor heterostructures.


2012 ◽  
Vol 18-19 ◽  
pp. 89-96
Author(s):  
Maya Marinova ◽  
Alkyoni Mantzari ◽  
Ariadne Andreadou ◽  
Efstathios K. Polychroniadis

In the present work we report on the polytypic transformations taking place in nanoscale dimensions within 6H-SiC crystals. The examined crystals were grown by Liquid Phase Epitaxy using a mixture of Si and Al as solvents. The study concentrated on the differences from the “correct” stacking order of the Si-C bilayers for 6H-SiC leading to the formation of other polytypes. A great variety of sequences was found, which resulted to the appearance of rare short and long period polytypes or individual lamellae having their “own” stacking inside the 6H-SiC matrix. These nanostructured faults which deteriorate the quality of the grown material indicate also their “sensitivity” to any small or even infinitesimal change of the growth conditions, due to the very small energy among them.


2010 ◽  
Vol 12 ◽  
pp. 99-104
Author(s):  
Maya Marinova ◽  
Efstathios K. Polychroniadis

The present work deals with the structural properties of silicon carbide in nanoscale dimensions. The examined crystals were 6H-SiC grown by Liquid Phase Epitaxy. The study was concentrated on the stacking faults and any other differences from the “correct” stacking order of the Si-C bilayers for this polytype. Three main types of stacking faults were observed: (i) Cubic lamellae with thickness of four and two Si-C bilayers, always occurring in reverse stacking with respect to each other and separated by at least one unit cell of 6H-SiC; (ii) “twinned” 6H-SiC lamellae separated by a two-bilayer thick cubic inclusion. As a result the sequence in the “twinned” 6H-SiC changes from (3+3-) to (3-3+). (iii) Lamellae showing fringes, the interrelated distance of which suggests inclusion with sequence (22). Further, a high variety of sequences was found, leading to the appearance of rare long period polytypes or individual lamellae having their “own” stacking inside the 6H-SiC matrix. These nanostructured faults which deteriorate the quality of the grown material indicate also their “sensitivity” to any small or even infinitesimal change of the growth conditions, due to the very small energy among them.


1985 ◽  
Vol 54 ◽  
Author(s):  
E. Bauser ◽  
D. KÄss ◽  
M. Warth ◽  
H. P. Strunk

ABSTRACTSingle-crystal silicon layers and doping multilayers have been grown by liquid phase qpitaxy on silicon substrates. The substrates were either partially masked by SiO2, with via holes of various shapes and sizes, or patterned with SiO2 stripes, or profiled with grooves and ridges. The via holes and grooves were just refilled, or they acted as seeding areas for lateral overgrowth of the oxidized wafer up to 100μm. The silicon layers, interfaces and heterointerfaces were free of defects. With appropriate growth conditions the surfaces and interfaces of the epitaxial Si were outstandingly planar.


1987 ◽  
Vol 85 (3) ◽  
pp. 389-395 ◽  
Author(s):  
K.C. Yoo ◽  
R.P. Storrick ◽  
W.E. Kramer ◽  
A.M. Stewart ◽  
R.H. Hopkins

2017 ◽  
Vol 58 (3) ◽  
pp. 509-512 ◽  
Author(s):  
Masayoshi Adachi ◽  
Ryuta Sekiya ◽  
Hiroyuki Fukuyama

1989 ◽  
Vol 3 (3) ◽  
pp. 279-285
Author(s):  
V. Stojanoff ◽  
M.A. Shahid ◽  
T.L. McDevitt ◽  
S. Mahajan ◽  
T.E. Schlesinger ◽  
...  

1997 ◽  
Vol 485 ◽  
Author(s):  
A. M. Sembian ◽  
I. Silier ◽  
K. Davies ◽  
A. Gutjahr ◽  
K. Lyutovich ◽  
...  

AbstractWe have investigated the surface morphology of thick SiGe layers grown on Si(100) substrates. SiGe layers containing different Ge concentrations (from 0 to 16 at.%) and having thickness of about 15μm are prepared by liquid phase epitaxy (LPE) method using various growth conditions. The wavelength of undulation of SiGe layers is found to be increasing when we adopt low cooling rates during LPE process. The roughness of the layer does not show any significant change with cooling rate.


Author(s):  
F. Banhart ◽  
F.O. Phillipp ◽  
R. Bergmann ◽  
E. Czech ◽  
M. Konuma ◽  
...  

Defect-free silicon layers grown on insulators (SOI) are an essential component for future three-dimensional integration of semiconductor devices. Liquid phase epitaxy (LPE) has proved to be a powerful technique to grow high quality SOI structures for devices and for basic physical research. Electron microscopy is indispensable for the development of the growth technique and reveals many interesting structural properties of these materials. Transmission and scanning electron microscopy can be applied to study growth mechanisms, structural defects, and the morphology of Si and SOI layers grown from metallic solutions of various compositions.The treatment of the Si substrates prior to the epitaxial growth described here is wet chemical etching and plasma etching with NF3 ions. At a sample temperature of 20°C the ion etched surface appeared rough (Fig. 1). Plasma etching at a sample temperature of −125°C, however, yields smooth and clean Si surfaces, and, in addition, high anisotropy (small side etching) and selectivity (low etch rate of SiO2) as shown in Fig. 2.


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