Pentacene field-effect transistors on plastic films operating at high temperature above 100°C

2004 ◽  
Vol 85 (17) ◽  
pp. 3902-3904 ◽  
Author(s):  
Tsuyoshi Sekitani ◽  
Shingo Iba ◽  
Yusaku Kato ◽  
Takao Someya
Keyword(s):  
High Temperature ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Plastic Films

High-temperature modeling and characterization of 6H silicon carbide metal-oxide-semiconductor field-effect transistors

2005 ◽  
Vol 97 (4) ◽  
pp. 046106 ◽  
Author(s):  
Stephen K. Powell ◽  
Neil Goldsman ◽  
Aivars Lelis ◽  
James M. McGarrity ◽  
Flynn B. McLean
Keyword(s):  
Silicon Carbide ◽  
High Temperature ◽  
Metal Oxide ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Temperature Modeling

Extended High-Temperature Operation of Silicon Carbide CMOS Circuits for Venus Surface Application

2016 ◽  
Vol 13 (4) ◽  
pp. 143-154 ◽  
Author(s):  
Jim Holmes ◽  
A. Matthew Francis ◽  
Ian Getreu ◽  
Matthew Barlow ◽  
Affan Abbasi ◽  
...  
Keyword(s):  
High Temperature ◽  
Integrated Circuits ◽  
Integrated Circuit ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Logic Synthesis ◽  
Oxide Semiconductor ◽  
Cmos Process ◽  
Timing Models ◽  
High Temperature Operation

In the last decade, significant effort has been expended toward the development of reliable, high-temperature integrated circuits. Designs based on a variety of active semiconductor devices including junction field-effect transistors and metal-oxide-semiconductor (MOS) field-effect transistors have been pursued and demonstrated. More recently, advances in low-power complementary MOS (CMOS) devices have enabled the development of highly integrated digital, analog, and mixed-signal integrated circuits. The results of elevated temperature testing (as high as 500°C) of several building block circuits for extended periods (up to 100 h) are presented. These designs, created using the Raytheon UK's HiTSiC® CMOS process, present the densest, lowest-power integrated circuit technology capable of operating at extreme temperatures for any period. Based on these results, Venus nominal temperature (470°C) transistor models and gate-level timing models were created using parasitic extracted simulations. The complete CMOS digital gate library is suitable for logic synthesis and lays the foundation for complex integrated circuits, such as a microcontroller. A 16-bit microcontroller, based on the OpenMSP 16-bit core, is demonstrated through physical design and simulation in SiC-CMOS, with an eye for Venus as well as terrestrial applications.

High-Temperature Operation of Normally Off-Mode AlGaN/GaN Heterostructure Field-Effect Transistors with p-GaN Gate

2011 ◽  
Vol 50 (1S1) ◽  
pp. 01AD03 ◽  
Author(s):  
Takayuki Sugiyama ◽  
Hiroshi Amano ◽  
Daisuke Iida ◽  
Motoaki Iwaya ◽  
Satoshi Kamiyama ◽  
...  
Keyword(s):  
High Temperature ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Heterostructure Field Effect Transistors ◽  
Gan Heterostructure ◽  
High Temperature Operation

Characteristics of Organic Field-Effect Transistors with Quick-Annealed Polymer Channel Layers at High Temperature

2017 ◽  
Vol 12 (6) ◽  
pp. 557-560
Author(s):  
Chulyeon Lee ◽  
Jooyeok Seo ◽  
Hyemi Han ◽  
Woongki Lee ◽  
Hwajeong Kim ◽  
...  
Keyword(s):  
High Temperature ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Organic Field Effect Transistors

Copper Phthalocyanine Single-crystal Field-effect Transistors Stable Above 100°C

2006 ◽  
Vol 937 ◽  
Author(s):  
Koichi Yamada ◽  
Jun Takeya ◽  
Kunji Shigeto ◽  
Kazuhito Tsukagoshi ◽  
Yoshinobu Aoyagi ◽  
...  
Keyword(s):  
High Temperature ◽  
Single Crystal ◽  
Crystal Field ◽  
Field Effect ◽  
Copper Phthalocyanine ◽  
Field Effect Transistors ◽  
Measured Temperature ◽  
Field Effect Mobility ◽  
Crystal Field Effect ◽  
Activation Type

ABSTRACTIntrinsic charge transport of copper phthalocyanine single-crystal field-effect transistors is measured as function of temperature up to above 100°C. The conduction of the accumulated carriers shows hopping-type transport, so that the field-effect mobility increases with temperature following activation-type temperature dependence throughout the measured temperature region. Due to excellent material stability at the high temperature, the mobility values are precisely reproduced after the heat cycles.

Improved Characteristics of SiC MOSFETs by Post-Oxidation Annealing in Ar at High Temperature

2011 ◽  
Vol 679-680 ◽  
pp. 445-448 ◽  
Author(s):  
Muneharu Kato ◽  
Yuichiro Nanen ◽  
Jun Suda ◽  
Tsunenobu Kimoto
Keyword(s):  
High Temperature ◽  
Thermal Oxidation ◽  
Field Effect ◽  
Secondary Ion Mass Spectrometry ◽  
Field Effect Transistors ◽  
Oxide Semiconductor ◽  
Gate Oxides ◽  
Secondary Ion ◽  
Improved Characteristics ◽  
Peak Value

Post-oxidation annealing (POA) in Ar at high temperature has been performed during fabrication of 4H-SiC metal-oxide-semiconductor field-effect transistors (MOSFETs). The gate oxides were formed by thermal oxidation followed by N2O annealing, then annealed in Ar for 30 min or 5 h at 1300 °C. The results of Secondary Ion Mass Spectrometry (SIMS) measurements indicated that the C atoms accumulated at the SiO2/SiC interface by thermal oxidation diffused during the 5h-Ar annealing. The characteristics of n-channel MOSFETs were improved and the peak value of field effect mobility was increased to 33 cm2/Vs from 19 cm2/Vs by extending the Ar annealing time.

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