Epitaxial growth of high quality ZnO:Al film on silicon with a thin γ-Al2O3 buffer layer

2003 ◽  
Vol 93 (7) ◽  
pp. 3837-3843 ◽  
Author(s):  
Manoj Kumar ◽  
R. M. Mehra ◽  
A. Wakahara ◽  
M. Ishida ◽  
A. Yoshida
1995 ◽  
Vol 66 (19) ◽  
pp. 2531-2533 ◽  
Author(s):  
Dong‐Keun Kim ◽  
Ju‐Heon Ahn ◽  
Byung‐Teak Lee ◽  
H. J. Lee ◽  
S. S. Cha ◽  
...  

1992 ◽  
Vol 61 (22) ◽  
pp. 2688-2690 ◽  
Author(s):  
T. Detchprohm ◽  
K. Hiramatsu ◽  
H. Amano ◽  
I. Akasaki

1986 ◽  
Vol 48 (5) ◽  
pp. 353-355 ◽  
Author(s):  
H. Amano ◽  
N. Sawaki ◽  
I. Akasaki ◽  
Y. Toyoda

2005 ◽  
Vol 865 ◽  
Author(s):  
C. Pettenkofer ◽  
C. Lehmann ◽  
W. Calvet

AbstractCuInS2 films were prepared on Si(111) by MOMBE using standard MBE Cu and In sources and Ditertbutyldisulfide (TBDS) as an organic sulfur precursor. The films were analyzed in situ by XPS, LEED and UPS. Deposition at 250°C yields chalcopyrite films [1] with admixtures of CuSi2 and CuIn alloys. Deposition at higher temperatures up to 550°C was used to clarify the feasibility of the process. High quality LEED diffraction patterns show epitaxial growth but CuSi2 precipitations are still observed for deposition on Si(111). A buffer layer of indiumsulfide showed no considerable effect on the interface morphology. The obtained LEED pattern are in accordance with the epitaxial relation Si{111}||CuInS2{112}. Even for temperatures as high as 550°C no incorporation of Carbon or residual hydrocarbons in the film or adsorbed at the surface were detected.


2008 ◽  
Author(s):  
W. R. Liu ◽  
Y. H. Li ◽  
W. F. Hsieh ◽  
C. H. Hsu ◽  
W. C. Lee ◽  
...  

2016 ◽  
Vol 858 ◽  
pp. 159-162 ◽  
Author(s):  
Ruggero Anzalone ◽  
Nicolò Piluso ◽  
Riccardo Reitano ◽  
Alessandra Alberti ◽  
Patrick Fiorenza ◽  
...  

A study of the carbonization process and of a low temperature buffer layer on the Cubic Silicon Carbide (3C-SiC) epitaxial growth has been reported in this work. From this study it has been evidenced the importance of the C/H2 ratio and of the buffer layer process on the voids formation at the 3C-SiC/Si interface. From our study, the influence of the voids the wafer curvature is highlighted. It has been observed that decreasing the density of these voids, decreases the stress of the 3C-SiC film; consequently, the wafer curvature is reduced.


2011 ◽  
Vol 26 (5) ◽  
pp. 481-485
Author(s):  
Yan-Ling CHENG ◽  
Hong-Li SUO ◽  
Min LIU ◽  
Lin MA ◽  
Teng ZHANG

Nanomaterials ◽  
2021 ◽  
Vol 11 (4) ◽  
pp. 928
Author(s):  
Yong Du ◽  
Zhenzhen Kong ◽  
Muhammet Toprak ◽  
Guilei Wang ◽  
Yuanhao Miao ◽  
...  

This work presents the growth of high-quality Ge epilayers on Si (001) substrates using a reduced pressure chemical vapor deposition (RPCVD) chamber. Based on the initial nucleation, a low temperature high temperature (LT-HT) two-step approach, we systematically investigate the nucleation time and surface topography, influence of a LT-Ge buffer layer thickness, a HT-Ge growth temperature, layer thickness, and high temperature thermal treatment on the morphological and crystalline quality of the Ge epilayers. It is also a unique study in the initial growth of Ge epitaxy; the start point of the experiments includes Stranski–Krastanov mode in which the Ge wet layer is initially formed and later the growth is developed to form nuclides. Afterwards, a two-dimensional Ge layer is formed from the coalescing of the nuclides. The evolution of the strain from the beginning stage of the growth up to the full Ge layer has been investigated. Material characterization results show that Ge epilayer with 400 nm LT-Ge buffer layer features at least the root mean square (RMS) value and it’s threading dislocation density (TDD) decreases by a factor of 2. In view of the 400 nm LT-Ge buffer layer, the 1000 nm Ge epilayer with HT-Ge growth temperature of 650 °C showed the best material quality, which is conducive to the merging of the crystals into a connected structure eventually forming a continuous and two-dimensional film. After increasing the thickness of Ge layer from 900 nm to 2000 nm, Ge surface roughness decreased first and then increased slowly (the RMS value for 1400 nm Ge layer was 0.81 nm). Finally, a high-temperature annealing process was carried out and high-quality Ge layer was obtained (TDD=2.78 × 107 cm−2). In addition, room temperature strong photoluminescence (PL) peak intensity and narrow full width at half maximum (11 meV) spectra further confirm the high crystalline quality of the Ge layer manufactured by this optimized process. This work highlights the inducing, increasing, and relaxing of the strain in the Ge buffer and the signature of the defect formation.


Nanomaterials ◽  
2021 ◽  
Vol 11 (3) ◽  
pp. 788
Author(s):  
Jian-Huan Wang ◽  
Ting Wang ◽  
Jian-Jun Zhang

Controllable growth of wafer-scale in-plane nanowires (NWs) is a prerequisite for achieving addressable and scalable NW-based quantum devices. Here, by introducing molecular beam epitaxy on patterned Si structures, we demonstrate the wafer-scale epitaxial growth of site-controlled in-plane Si, SiGe, and Ge/Si core/shell NW arrays on Si (001) substrate. The epitaxially grown Si, SiGe, and Ge/Si core/shell NW are highly homogeneous with well-defined facets. Suspended Si NWs with four {111} facets and a side width of about 25 nm are observed. Characterizations including high resolution transmission electron microscopy (HRTEM) confirm the high quality of these epitaxial NWs.


2012 ◽  
Vol 45 (41) ◽  
pp. 415306 ◽  
Author(s):  
T I Wong ◽  
H R Tan ◽  
D Sentosa ◽  
L M Wong ◽  
S J Wang ◽  
...  

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