Growth and characterization of GaAs epitaxial layers on Si/porous Si/Si substrate by chemical beam epitaxy

2001 ◽  
Vol 89 (9) ◽  
pp. 5215-5218 ◽  
Author(s):  
S. Saravanan ◽  
Y. Hayashi ◽  
T. Soga ◽  
T. Jimbo ◽  
M. Umeno ◽  
...  
2002 ◽  
Vol 237-239 ◽  
pp. 1450-1454 ◽  
Author(s):  
S. Saravanan ◽  
Y. Hayashi ◽  
T. Soga ◽  
T. Jimbo ◽  
M. Umeno ◽  
...  

1993 ◽  
Vol 334 ◽  
Author(s):  
N. Dietz ◽  
S. Habermehl ◽  
J. T. Kelliher ◽  
G. Lucovsky ◽  
K. J. Bachmann

AbstractThe low temperature epitaxial growth of Si / GaP / Si heterostructures is investigated with the aim using GaP as a dielectric isolation layer for Si circuits. GaP layers have been deposited on Si(100) surfaces by chemical beam epitaxy (CBE) using tertiarybutyl phosphine (TBP) and triethylgallium (TEG) as source materials. The influence of the cleaning and passivation of the GaP surface has been studied in-situ by AES and LEED, with high quality epitaxial growth proceeding on vicinal GaP(100) substrates. Si / GaP / Si heterostructures have been investigated by cross sectional high resolution transmission electron microscope (HRTEM) and secondary ion mass spectroscope (SIMS). These methods reveal the formation of an amorphous SiC interlayer between the Si substrate and GaP film due to diffusion of carbon generated in the decomposition of the metalorganic precursors at the surface to the GaP/Si interface upon prolonged growth (layer thickness > 300Å). The formation of twins parallel to {111} variants in the GaP epilayer are extended into the subsequently grown Si film with minor generation of new twins.


1998 ◽  
Vol 535 ◽  
Author(s):  
S. E. Saddow ◽  
M. E. Okhusyen ◽  
M. S. Mazzola ◽  
M. Dudley ◽  
X. R. Huang ◽  
...  

AbstractIn this paper we discuss the growth and characterization of 3C-SiC epitaxial layers grown on both a Si substrate as well as on a novel substrate. The growth uses a typical three step process. First an etch of the Si surface is performed, second the surface of the Si is carbonized and third 3C-SiC is grown on the carbonized surface. Several characterization techniques were used to verify the quality of the 3C-SiC film. Microscopy was used to investigate the surface morphology, X-ray and electron diffraction were used to determine crystal structure, cross section TEM was used to verify crystal structure and highlight twinning, and x-ray topography was used to measure the strain fields induced in Si substrate at the 3C-SiC/Si interface.


2021 ◽  
Vol 16 (1) ◽  
Author(s):  
Yijie Li ◽  
Nguyen Van Toan ◽  
Zhuqing Wang ◽  
Khairul Fadzli Bin Samat ◽  
Takahito Ono

AbstractPorous silicon (Si) is a low thermal conductivity material, which has high potential for thermoelectric devices. However, low output performance of porous Si hinders the development of thermoelectric performance due to low electrical conductivity. The large contact resistance from nonlinear contact between porous Si and metal is one reason for the reduction of electrical conductivity. In this paper, p- and n-type porous Si were formed on Si substrate by metal-assisted chemical etching. To decrease contact resistance, p- and n-type spin on dopants are employed to dope an impurity element into p- and n-type porous Si surface, respectively. Compared to the Si substrate with undoped porous samples, ohmic contact can be obtained, and the electrical conductivity of doped p- and n-type porous Si can be improved to 1160 and 1390 S/m, respectively. Compared with the Si substrate, the special contact resistances for the doped p- and n-type porous Si layer decreases to 1.35 and 1.16 mΩ/cm2, respectively, by increasing the carrier concentration. However, the increase of the carrier concentration induces the decline of the Seebeck coefficient for p- and n-type Si substrates with doped porous Si samples to 491 and 480 μV/K, respectively. Power factor is related to the Seebeck coefficient and electrical conductivity of thermoelectric material, which is one vital factor that evaluates its output performance. Therefore, even though the Seebeck coefficient values of Si substrates with doped porous Si samples decrease, the doped porous Si layer can improve the power factor compared to undoped samples due to the enhancement of electrical conductivity, which facilitates its development for thermoelectric application.


2005 ◽  
Vol 34 (1) ◽  
pp. 23-26 ◽  
Author(s):  
Edward Y. Chang ◽  
Tsung-Hsi Yang ◽  
Guangli Luo ◽  
Chun-Yen Chang

Author(s):  
P. Wei ◽  
M. Chicoine ◽  
S. Gujrathi ◽  
F. Schiettekatte ◽  
J.-N. Beaudry ◽  
...  

1998 ◽  
Vol 189-190 ◽  
pp. 435-438 ◽  
Author(s):  
Hiroshi Harima ◽  
Toshiaki Inoue ◽  
Shin-ichi Nakashima ◽  
Hajime Okumura ◽  
Yuuki Ishida ◽  
...  

2001 ◽  
Vol 703 ◽  
Author(s):  
Huiping Xu ◽  
Adam T. Wise ◽  
Timothy J. Klemmer ◽  
Jörg M. K. Wiezorek

ABSTRACTA combination of XRD and TEM techniques have been used to characterize the response of room temperature magnetron sputtered Fe-Pd thin films on Si-susbtrates to post-deposition order-annealing at temperatures between 400-500°C. Deposition produced the disordered Fe-Pd phase with (111)-twinned grains approximately 18nm in size. Ordering occurred for annealing at 450°C and 500°C after 1.8ks, accompanied by grain growth (40-70nm). The ordered FePd grains contained (111)-twins rather than {101}-twins typical of bulk ordered FePd. The metallic overlayers and underlayers selected here produced detrimental dissolution (Pt into Fe-Pd phases) and precipitation reactions between Pd and the Si substrate.


2012 ◽  
Vol 7 (1) ◽  
pp. 388 ◽  
Author(s):  
Karumbaiah N Chappanda ◽  
York R Smith ◽  
Swomitra K Mohanty ◽  
Loren W Rieth ◽  
Prashant Tathireddy ◽  
...  
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