Disorder of ZnSe/ZnS strained‐layer superlattices by N+or Li+ion implantation and low‐temperature annealing

1991 ◽  
Vol 58 (1) ◽  
pp. 53-55 ◽  
Author(s):  
Toshiya Yokogawa ◽  
Tohru Saitoh ◽  
Tadashi Narusawa
Keyword(s):  
Low Temperature ◽  
Ion Implantation ◽  
Strained Layer ◽  
Low Temperature Annealing ◽  
Li Ion ◽  
Strained Layer Superlattices

The substitutionality of hafnium in sapphire by ion implantation and low temperature annealing

1996 ◽  
pp. 602-605
Author(s):  
J.G. Marques ◽  
A.A. Melo ◽  
J.C. Soares ◽  
E. Alves ◽  
M.F. da Silva ◽  
...  
Keyword(s):  
Low Temperature ◽  
Ion Implantation ◽  
Low Temperature Annealing

Disordering of CdZnSe/ZnSe Strained Layer Superlattices by Ion Implantation

1995 ◽  
Vol 34 (Part 1, No. 2B) ◽  
pp. 1159-1161 ◽  
Author(s):  
Toshiya Yokogawa ◽  
James Merz ◽  
Hon Luo ◽  
Jack Furdyna ◽  
Sylvanus Lau ◽  
...  
Keyword(s):  
Ion Implantation ◽  
Strained Layer ◽  
Strained Layer Superlattices

Extended platelets on {111} in GaAs created by He-ion implantation followed by low temperature annealing

1997 ◽  
Vol 71 (2) ◽  
pp. 255-257 ◽  
Author(s):  
T. Nomachi ◽  
S. Muto ◽  
M. Hirata ◽  
H. Kohno ◽  
Jun Yamasaki ◽  
...  
Keyword(s):  
Low Temperature ◽  
Ion Implantation ◽  
Low Temperature Annealing

Correlation between Current Transport and Defects in n+/p 6H-SiC Diodes

2006 ◽  
Vol 527-529 ◽  
pp. 811-814 ◽  
Author(s):  
Mariaconcetta Canino ◽  
Antonio Castaldini ◽  
Anna Cavallini ◽  
Francesco Moscatelli ◽  
Roberta Nipoti ◽  
...  
Keyword(s):  
Low Temperature ◽  
Ion Implantation ◽  
Transport Properties ◽  
Current Transport ◽  
Step Bunching ◽  
Excess Current ◽  
Low Temperature Annealing ◽  
Current Voltage ◽  
P Type

This paper reports on the defects created in a 6H-SiC p-type substrate by a process of ion implantation and a quite low temperature annealing (1300 °C), suitable for the realization of the source/drain regions of a MOSFET because it does not give rise to step bunching phenomena. Current voltage measurements showed the presence of a group of diodes featured by excess current. The effects of defects under the implanted layer on the transport properties of the diodes were investigated by DLTS: four hole traps were detected in all the measured diodes; besides, a broadened peak around 550 K was detected in the diodes that show excess current.

Disordering of ZnSe/ZnS strained‐layer superlattices by Si ion implantation

1989 ◽  
Vol 55 (8) ◽  
pp. 735-737 ◽  
Author(s):  
Tohru Saitoh ◽  
Toshiya Yokogawa ◽  
Tadashi Narusawa
Keyword(s):  
Ion Implantation ◽  
Strained Layer ◽  
Strained Layer Superlattices ◽  
Si Ion Implantation
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