Super junction LDMOS with step field oxide layer

2016 ◽  
Vol 11 (11) ◽  
pp. 666-669 ◽  
Author(s):  
Zhen Cao ◽  
Baoxing Duan ◽  
Xiaoning Yuan ◽  
Song Yuan ◽  
Yintang Yang
Keyword(s):  
Oxide Layer ◽  
Field Oxide

Effect of the Field Oxidation Process on the Electrical Characteristics of 6500V 4H-SiC JBS Diodes

2020 ◽  
Vol 1014 ◽  
pp. 144-148
Author(s):  
Ling Sang ◽  
Jing Hua Xia ◽  
Liang Tian ◽  
Fei Yang ◽  
Rui Jin ◽  
...  
Keyword(s):  
Chemical Vapor Deposition ◽  
Oxide Layer ◽  
Vapor Deposition ◽  
Oxidation Process ◽  
Chemical Vapor ◽  
Oxide Thickness ◽  
Electrical Characteristics ◽  
Field Plate ◽  
Plate Length ◽  
Field Oxide

The effect of the field oxidation process on the electrical characteristics of 6500V 4H-SiC JBS diodes is studied. The oxide thickness and field plate length have an effect on the reverse breakdown voltage of the SiC JBS diode. According the simulation results, we choose the optimal thickness of the oxide layer and field plate length of the SiC JBS diode. Two different field oxide deposition processes, which are plasma enhanced chemical vapor deposition (PECVD) and low pressure chemical vapor deposition (LPCVD), are compared in our paper. When the reverse voltage is 6600V, the reverse leakage current of SiC JBS diodes with the field oxide layer obtained by LPCVD process is 0.7 μA, which is 60% lower than that of PECVD process. When the forward current is 25 A, the forward voltage of SiC JBS diodes with the field oxide layer obtained by LPCVD process is 3.75 V, which is 10% higher than that of PECVD process. There should be a trade-off between the forward and reverse characteristics in the actual high power and high temperature applications.

scholarly journals Electrostatic-Discharge-Immunity Impacts in 300 V nLDMOS by Comprehensive Drift-Region Engineering

Electronics ◽  
2019 ◽  
Vol 8 (12) ◽  
pp. 1469 ◽  
Author(s):  
Po-Lin Lin ◽  
Shen-Li Chen ◽  
Sheng-Kai Fan
Keyword(s):  
Integrated Circuits ◽  
Oxide Layer ◽  
Breakdown Voltage ◽  
Electrostatic Discharge ◽  
Reference Group ◽  
Lateral Diffusion ◽  
Oxide Semiconductor ◽  
Drift Region ◽  
Field Oxide ◽  
Latch Up

Electrostatic discharge (ESD) events are the main factors impacting the reliability of Integrated circuits (ICs); therefore, the ESD immunity level of these ICs is an important index. This paper focuses on comprehensive drift-region engineering for ultra-high-voltage (UHV) circular n-channel lateral diffusion metal-oxide-semiconductor transistor (nLDMOS) devices used to investigate impacts on ESD ability. Under the condition of fixed layout area, there are four kinds of modulation in the drift region. First, by floating a polysilicon stripe above the drift region, the breakdown voltage and secondary breakdown current of this modulation can be increased. Second, adjusting the width of the field-oxide layer in the drift region when the width of the field-oxide layer is 5.8 μm will result in the minimum breakdown voltage (105 V) but the best secondary breakdown current (6.84 A). Third, by adjusting the discrete unit cell and its spacing, the corresponding improved trigger voltage, holding voltage, and secondary breakdown current can be obtained. According to the experimental results, the holding voltage of all devices under test (DUTs) is greater than that of the reference group, so the discrete HV N-Well (HVNW) layer can effectively improve its latch-up immunity. Finally, by embedding different P-Well lengths, the findings suggest that when the embedded P-Well length is 9 μm, it will have the highest ESD ability and latch-up immunity.

AC Photovoltaic Inspection of P-N Junctions having High Leakage Current

1989 ◽  
Vol 163 ◽  
Author(s):  
N. Honma ◽  
H. Shimizu ◽  
C. Munakata ◽  
M. Ogasawara
Keyword(s):  
Oxide Layer ◽  
Leakage Current ◽  
Photon Beam ◽  
Si Substrate ◽  
High Leakage Current ◽  
P Type ◽  
Field Oxide ◽  
Positively Charged ◽  
Si Wafer

AbstractA focused photon beam chopped at 2 kHz scans p-n junctions in a p-type Si wafer and ac photovoltages are capacitively measured in order to inspect homogeneities of the junctions. It is found that the ac photovoltages are high not only in the junction areas but also in the field oxide regions around the junctions when the junctions are leaky. This indicates that dense positively charged traps exist at the interface between the heavily boron implanted Si substrate and the field oxide layer around the high leakage junction, and that the traps cause the increase in both the junction leakage current and the ac photovoltage.

The Effect of Channel-Protect Oxide on Laser Recrystallized Silicon-on-insulator MOS devices.

1986 ◽  
Vol 74 ◽  
Author(s):  
S. Sritharan ◽  
G. J. Collins ◽  
J. Fukumoto ◽  
N. Szluk ◽  
K. M. Jones ◽  
...  
Keyword(s):  
Oxide Layer ◽  
Silicon On Insulator ◽  
Bulk Silicon ◽  
Cmos Transistors ◽  
Mos Devices ◽  
Laser Recrystallization ◽  
Field Oxide ◽  
Channel Region ◽  
Seed Area

AbstractLatchup free lateral CMOS transistors with PMOS devices in the laser recrystallized silicon and the NMOS devices in the bulk silicon were fabricated. One micron thick field oxide isolates the PMOS devices in the recrystallized silicon from the NMOS devices in the bulk wafer. The seed area for recrystallization was used for the fabrication of the NMOS devices. An oxide layer of 0.1um thickness was used to protect the channel region of the NMOS devices during the laser recrystallization. The effect of this channel protect-oxide is discussed and the characteristics of the NMOS devices with and without the channel protect oxide are compared.

Structural changes in silicon-on-insulator material during post-implantation annealing

1986 ◽  
Vol 44 ◽  
pp. 736-737
Author(s):  
C. O. Jung ◽  
S. J. Krause ◽  
S.R. Wilson
Keyword(s):  
Integrated Circuits ◽  
Oxide Layer ◽  
High Speed ◽  
Structural Changes ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
High Quality ◽  
Radiation Hardened ◽  
Post Implantation ◽  
Very High

Silicon-on-insulator (SOI) structures have excellent potential for future use in radiation hardened and high speed integrated circuits. For device fabrication in SOI material a high quality superficial Si layer above a buried oxide layer is required. Recently, Celler et al. reported that post-implantation annealing of oxygen implanted SOI at very high temperatures would eliminate virtually all defects and precipiates in the superficial Si layer. In this work we are reporting on the effect of three different post implantation annealing cycles on the structure of oxygen implanted SOI samples which were implanted under the same conditions.

ffect of Na2WO4 in electrolyte on mechanical properties of oxide layer on Al alloy via plasma electrolytic oxidation

2015 ◽  
Vol 53 (8) ◽  
pp. 535-540 ◽  
Author(s):  
Young Gun Ko ◽  
Dong Hyuk Shin ◽  
Hae Woong Yang ◽  
Yeon Sung Kim ◽  
Joo Hyun Park ◽  
...  
Keyword(s):  
Mechanical Properties ◽  
Oxide Layer ◽  
Plasma Electrolytic Oxidation ◽  
Al Alloy ◽  
Electrolytic Oxidation ◽  
Plasma Electrolytic

Correlation Between the Tunnelling Oxide and I-V Curves of MIS Photodiodes

2003 ◽  
Vol 762 ◽  
Author(s):  
H. Águas ◽  
L. Pereira ◽  
A. Goullet ◽  
R. Silva ◽  
E. Fortunato ◽  
...  
Keyword(s):  
Hydrogen Peroxide ◽  
Oxide Layer ◽  
Spectroscopic Ellipsometry ◽  
Chemical Deposition ◽  
Oxide Thickness ◽  
Electrical Performance ◽  
Signal To Noise ◽  
Rectification Factor ◽  
Mis Devices ◽  
The Ideal

AbstractIn this work we present results of a study performed on MIS diodes with the following structure: substrate (glass) / Cr (2000Å) / a-Si:H n+ (400Å) / a-Si:H i (5500Å) / oxide (0-40Å) / Au (100Å) to determine the influence of the oxide passivation layer grown by different techniques on the electrical performance of MIS devices. The results achieved show that the diodes with oxides grown using hydrogen peroxide present higher rectification factor (2×106)and signal to noise (S/N) ratio (1×107 at -1V) than the diodes with oxides obtained by the evaporation of SiO2, or by the chemical deposition of SiO2 by plasma of HMDSO (hexamethyldisiloxane), but in the case of deposited oxides, the breakdown voltage is higher, 30V instead of 3-10 V for grown oxides. The ideal oxide thickness, determined by spectroscopic ellipsometry, is dependent on the method used to grow the oxide layer and is in the range between 6 and 20 Å. The reason for this variation is related to the degree of compactation of the oxide produced, which is not relevant for applications of the diodes in the range of ± 1V, but is relevant when high breakdown voltages are required.

Interactions of Ge Atoms with High- ê Oxide Dielectric Surfaces

2005 ◽  
Vol 879 ◽  
Author(s):  
Scott K. Stanley ◽  
John G. Ekerdt
Keyword(s):  
Oxide Layer ◽  
Photoelectron Spectroscopy ◽  
Chemical Vapor ◽  
Temperature Programmed Desorption ◽  
Tungsten Filament ◽  
X Ray ◽  
Dielectric Surfaces ◽  
Temperature Programmed ◽  
The Stability ◽  
Ge Nanocrystals

AbstractGe is deposited on HfO2 surfaces by chemical vapor deposition (CVD) with GeH4. 0.7-1.0 ML GeHx (x = 0-3) is deposited by thermally cracking GeH4 on a hot tungsten filament. Ge oxidation and bonding are studied at 300-1000 K with X-ray photoelectron spectroscopy (XPS). Ge, GeH, GeO, and GeO2 desorption are measured with temperature programmed desorption (TPD) at 400-1000 K. Ge initially reacts with the dielectric forming an oxide layer followed by Ge deposition and formation of nanocrystals in CVD at 870 K. 0.7-1.0 ML GeHx deposited by cracking rapidly forms a contacting oxide layer on HfO2 that is stable from 300-800 K. Ge is fully removed from the HfO2 surface after annealing to 1000 K. These results help explain the stability of Ge nanocrystals in contact with HfO2.

MODELING THE NORMAL SPECTRAL EMISSIVITY OF BRASS H62 AT 800–1100 K DURING OXIDE LAYER GROWTH

2018 ◽  
Vol 49 (15) ◽  
pp. 1445-1458
Author(s):  
Deheng Shi ◽  
Fenghui Zou ◽  
Zunlue Zhu ◽  
Jinfeng Sun
Keyword(s):  
Oxide Layer ◽  
Spectral Emissivity ◽  
Layer Growth ◽  
Normal Spectral Emissivity
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