Bi-way sorter. a two-dimensional systolic array

1992 ◽  
Vol 139 (2) ◽  
pp. 147
Author(s):  
G.A. Orton ◽  
L.E. Peppard ◽  
S.G. Akl
Keyword(s):  
Systolic Array ◽  
Two Dimensional

scholarly journals FFT for the APE Parallel Computer

1997 ◽  
Vol 08 (06) ◽  
pp. 1317-1334 ◽  
Author(s):  
Thomas Lippert ◽  
Klaus Schilling ◽  
Sven Trentmann ◽  
Federico Toschi ◽  
Raffaele Tripiccione
Keyword(s):  
Systolic Array ◽  
Parallel Computer ◽  
Massively Parallel ◽  
Two Dimensional ◽  
One Dimensional ◽  
Data Field ◽  
Matrix Transposition ◽  
Neighbor Connectivity ◽  
Parallel Fft ◽  
Parallel Fft Algorithm

We present a parallel FFT algorithm for SIMD systems following the "Transpose Algorithm" approach. The method is based on the assignment of the data field onto a one-dimensional ring of systolic cells. The systolic array can be universally mapped onto any parallel system. In particular for systems with next-neighbor connectivity our method has the potential to improve the efficiency of matrix transposition by use of hyper-systolic communication. We have realized a scalable parallel FFT on the APE100/Quadrics massively parallel computer, where our implementation is part of a two-dimensional hydrodynamics code for turbulence studies.

A PROCESSOR-TIME-MINIMAL DESIGN FOR 3D RECTILINEAR MESH ALGORITHMS

1996 ◽  
Vol 06 (04) ◽  
pp. 539-550 ◽  
Author(s):  
CHRIS SCHEIMAN ◽  
PETER CAPPELLO
Keyword(s):  
Lower Bounds ◽  
Systolic Array ◽  
Directed Acyclic Graph ◽  
Two Dimensional ◽  
Processor Time ◽  
Acyclic Graph ◽  
Multiprocessor Schedule ◽  
Minimal Design ◽  
Dag Model

The paper, using a directed acyclic graph (dag) model of algorithms, investigates precedence constrained multiprocessor schedules for the nx×ny×nz directed rectilinear mesh. Its completion requires at least nx+ny+nz−2 multiprocessor steps. Time-minimal multiprocessor schedules that use as few processors as possible are called processor-time-minimal. Lower bounds are shown for the nx×ny×nz directed mesh, and these bounds are shown to be exact by constructing a processor-time-minimal multiprocessor schedule that can be realized on a systolic array whose topology is either a two dimensional mesh or skewed cylinder.

Sign in / Sign up

Export Citation Format

Share Document