No-race charge-recycling complementary pass transistor logic

A. Abbasian; S.H. Rasouli; A. Afzali-Kusha; M. Nourani

doi:10.1049/ip-cdt:20040256

No-race charge-recycling complementary pass transistor logic

IEE Proceedings - Computers and Digital Techniques ◽

10.1049/ip-cdt:20040256 ◽

2004 ◽

Vol 151 (3) ◽

pp. 183

Author(s):

A. Abbasian ◽

S.H. Rasouli ◽

A. Afzali-Kusha ◽

M. Nourani

Keyword(s):

Charge Recycling ◽

Pass Transistor ◽

Pass Transistor Logic

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Low-race Split-level Charge-Recycling Pass-transistor Logic (LSCPL) for low power

Proceedings of the 12th IEEE International Conference on Fuzzy Systems (Cat. No.03CH37442) ◽

10.1109/icm.2003.237775 ◽

2003 ◽

Cited By ~ 1

Author(s):

S.H. Rasouli ◽

A. Afzali-Kusha ◽

A. Khademzadeh ◽

M. Nourani

Keyword(s):

Low Power ◽

Charge Recycling ◽

Pass Transistor ◽

Pass Transistor Logic

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Modular charge recycling pass transistor logic (MCRPL)

Electronics Letters ◽

10.1049/el:20000386 ◽

2000 ◽

Vol 36 (5) ◽

pp. 404 ◽

Cited By ~ 7

Author(s):

Seong-Ook Jung ◽

Sung-Mo Kang

Keyword(s):

Charge Recycling ◽

Pass Transistor ◽

Pass Transistor Logic

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No-race charge recycling complementary pass transistor logic (NCRCPL) for low power applications

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03. ◽

10.1109/iscas.2003.1206257 ◽

2003 ◽

Cited By ~ 1

Author(s):

A. Abbasian ◽

S. Rasouli ◽

A. Afzali-Kusha ◽

M. Nourani

Keyword(s):

Low Power ◽

Charge Recycling ◽

Pass Transistor ◽

Pass Transistor Logic

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High Performance CMOS 2-input NAND Based on Low-race Split-level Charge-recycling Pass-transistor Logic

2009 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools ◽

10.1109/dsd.2009.181 ◽

2009 ◽

Author(s):

José Carlos Garcia-Montesdeoca ◽

Juan A. Montiel-Nelson ◽

Saeid Nooshabadi

Keyword(s):

High Performance ◽

Charge Recycling ◽

Pass Transistor ◽

Pass Transistor Logic

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A high signal swing pass-transistor logic using surrounding gate transistor

2000 International Conference on Simulation Semiconductor Processes and Devices (Cat. No.00TH8502) ◽

10.1109/sispad.2000.871261 ◽

2002 ◽

Cited By ~ 1

Author(s):

T. Endoh ◽

T. Funaki ◽

H. Sakuraba ◽

F. Masuoka

Keyword(s):

High Signal ◽

Surrounding Gate ◽

Pass Transistor ◽

Pass Transistor Logic ◽

Signal Swing

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CMOS differential pass-transistor logic (CMOS DPTL) predischarge buffer design

Thirteenth National Radio Science Conference. NRSC '96 ◽

10.1109/nrsc.1996.551142 ◽

2002 ◽

Author(s):

S.I. Kayed ◽

H.F. Ragaei

Keyword(s):

Buffer Design ◽

Pass Transistor ◽

Pass Transistor Logic

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A 1.5 ns 32 b CMOS ALU in double pass-transistor logic

1993 IEEE International Solid-State Circuits Conference Digest of Technical Papers ◽

10.1109/isscc.1993.280071 ◽

1993 ◽

Cited By ~ 49

Author(s):

M. Suzuki ◽

N. Ohkubo ◽

T. Yamanaka ◽

A. Shimizu ◽

K. Sasaki

Keyword(s):

Double Pass ◽

Pass Transistor ◽

Pass Transistor Logic

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Digital compressor structure in neural network implementation using complex complementary pass-transistor logic (C/sup 2/PL)

Proceedings of 1994 37th Midwest Symposium on Circuits and Systems ◽

10.1109/mwscas.1994.519282 ◽

2002 ◽

Author(s):

D. Zhang ◽

M. Kamel ◽

M.I. Elmasry

Keyword(s):

Neural Network ◽

Pass Transistor ◽

Pass Transistor Logic

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Novel CMOS static ternary logic using double pass-transistor logic

The 2nd International Conference on Information Science and Engineering ◽

10.1109/icise.2010.5689867 ◽

2010 ◽

Cited By ~ 5

Author(s):

Guoqiang Hang ◽

Xuanchang Zhou

Keyword(s):

Ternary Logic ◽

Double Pass ◽

Pass Transistor ◽

Pass Transistor Logic

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Power Efficient Pulse Triggered Flip-Flop Design Using Pass Transistor Logic

Emerging Trends in Computing and Expert Technology - Lecture Notes on Data Engineering and Communications Technologies ◽

10.1007/978-3-030-32150-5_5 ◽

2019 ◽

pp. 48-61

Author(s):

C. S. Manju ◽

N. Poovizhi ◽

R. Rajkumar

Keyword(s):

Flip Flop ◽

Power Efficient ◽

Pass Transistor ◽

Pass Transistor Logic

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