High-performance low-power current sense amplifier using a cross-coupled current-mirror configuration

2002 ◽  
Vol 149 (5) ◽  
pp. 308-314 ◽  
Author(s):  
K.-S. Yeo ◽  
W.-L. Goh ◽  
Z.-H. Kong ◽  
Q-X. Zhang ◽  
W.-G. Yeo
Keyword(s):  
Low Power ◽  
High Performance ◽  
Current Mirror ◽  
Sense Amplifier ◽  
Mirror Configuration

A low voltage low power high performance FGMOS based current mirror

2017 ◽  
Vol 10 ◽  
pp. 263-271 ◽  
Author(s):  
Charu Rana ◽  
Neelofer Afzal ◽  
Dinesh Prasad
Keyword(s):  
Low Power ◽  
High Performance ◽  
Low Voltage ◽  
Current Mirror

An Ultra-Low Power and High Performance Single Ended Sense Amplifier for Low Voltage Flash Memories

2018 ◽  
Vol 14 (1) ◽  
pp. 157-169 ◽  
Author(s):  
W. Steve Ngueya ◽  
Jean-Michel Portal ◽  
Hassen Aziza ◽  
Julien Mellier ◽  
Stephane Ricard
Keyword(s):  
Low Power ◽  
High Performance ◽  
Low Voltage ◽  
Flash Memories ◽  
Ultra Low Power ◽  
Sense Amplifier

scholarly journals Low Power High Performance Current Mirror – A Review

2021 ◽  
Vol 1804 (1) ◽  
pp. 012161
Author(s):  
Ashok D. Vidhate ◽  
Shruti Suman
Keyword(s):  
Low Power ◽  
High Performance ◽  
Current Mirror

A New Simulator Based on Multi Core Processor with Improved Sense Amplifier

2015 ◽  
Vol 24 (09) ◽  
pp. 1550141 ◽  
Author(s):  
Erulappan Sakthivel ◽  
Veluchamy Malathi ◽  
Muruganantham Arunraja
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
High Performance ◽  
Routing Algorithm ◽  
Main Idea ◽  
Sense Amplifier ◽  
Area Reduction ◽  
Sense Amplifiers ◽  
On Chip ◽  
Multi Core Processor

In recent days, network-on-chip (NoC) researchers focus mainly on the area reduction and low power consumption both in architectural and algorithmic approach. To achieve low power and high performance in NoC architecture, sense amplifiers (SAs) introduced which can consume less power under various traffic conditions. In order to analyze the performance of architectural NoC design before fabrication level, the new simulator is developed based on multi core processor with improved sense amplifier (MCPSA) in this work. The MCPSA simulator provides user, the flexibility of incorporating various traffic configurations and routing algorithm with user reconfigurable option. In addition, the different SA model can be put into the simulation in plug and play manner for evaluation. The NoC case studies are presented to demonstrate the NoC architecture with double tail sense amplifier (DTSA) and modified-DTSA (M-DTSA) design. The performance metric such as delay, data rate and power consumption is evaluated. The main idea of this new simulator is to interface multisim environment (MSE) into a NoC environment for validating any DTSA.

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