Design model for fully integrated high-performance linear CMOS power amplifiers

2011 ◽  
Vol 5 (7) ◽  
pp. 795
Author(s):  
H. Solar ◽  
G. Bistué ◽  
J. Legarda ◽  
E. Fernández ◽  
R. Berenguer
Author(s):  
A. Ghiotto ◽  
A. Larie ◽  
E. Kerherve ◽  
B. Leite ◽  
B. Martineau ◽  
...  

2016 ◽  
Vol 28 (15) ◽  
pp. 2971-2977 ◽  
Author(s):  
Abdur Rehman Jalil ◽  
Hao Chang ◽  
Vineeth Kumar Bandari ◽  
Peter Robaschik ◽  
Jian Zhang ◽  
...  

2021 ◽  
Author(s):  
Giulia Acconcia ◽  
Francesco Malanga ◽  
Ivan Labanca ◽  
Massimo Ghioni ◽  
Ivan Rech

2022 ◽  
Vol 201 ◽  
pp. 110881
Author(s):  
Xiaoxi Mi ◽  
Lianjuan Tian ◽  
Aitao Tang ◽  
Jing Kang ◽  
Peng Peng ◽  
...  

2019 ◽  
Vol 2019 (1) ◽  
pp. 000438-000443 ◽  
Author(s):  
Joseph Meyer ◽  
Reza Moghimi ◽  
Noah Sturcken

Abstract The generational scaling of CMOS device geometries, as predicted by Moore's law, has significantly outpaced advances in CMOS package and power electronics technology. The conduction of power to a high-performance integrated circuit (IC) die typically requires close to 50% of package and IC I/O and is increasing with trends towards lower supply voltages and higher power density that occur in advanced CMOS nodes. The disparity in scaling of logic, package, and I/O technology has created a significant bottleneck that has become a dominant constraint on computational performance. By performing power conversion and voltage regulation in-package, this limitation can be mitigated. Integration of thin-film ferromagnetic inductors with CMOS technology enables single-chip power converters to be co-packaged with processors, high bandwidth memory (HBM), and/or other modules. This paper highlights the advantages of fully integrated package voltage regulators (PVRs), which include: reducing package I/O allocated for power, eliminating the need for upstream power-conversion stages, and improving transient response. These benefits substantially reduce the size, weight, and power of modern electronic systems.


Author(s):  
Frederic Souchon ◽  
Loic Joet ◽  
Carine Ladner ◽  
Patrice Rey ◽  
Stephan Louwers

Author(s):  
Robert Wolf ◽  
Niko Joram ◽  
Stefan Schumann ◽  
Frank Ellinger

This paper shows that the two most common impedance transformation networks for power amplifiers (PAs) can be designed to achieve optimum transformation at two frequencies. Hence, a larger bandwidth for the required impedance transformation ratio is achieved. A design procedure is proposed, which takes imperfections like losses into account. Furthermore, an analysis method is presented to estimate the maximum uncompressed output power of a PA with respect to frequency. Based on these results, a fully integrated PA with a dual-band impedance transformation network is designed and its functionality is proven by large signal measurement results. The amplifier covers the frequency band from 450 MHz to 1.2 GHz (3 dB bandwidth of the output power and efficiency), corresponding to a relative bandwidth of more than 100%. It delivers 23.7 dBm output power in the 1 dB compression point, having a power-added efficiency of 33%.


Sign in / Sign up

Export Citation Format

Share Document