Application-specific topology generation algorithms for network-on-chip design

S. Tosun; S. Ozdemir; Y. Ar

doi:10.1049/iet-cdt.2011.0080

Application-specific topology generation algorithms for network-on-chip design

IET Computers & Digital Techniques ◽

10.1049/iet-cdt.2011.0080 ◽

2012 ◽

Vol 6 (5) ◽

pp. 318-333 ◽

Cited By ~ 20

Author(s):

S. Tosun ◽

S. Ozdemir ◽

Y. Ar

Keyword(s):

Network On Chip ◽

Chip Design ◽

Topology Generation ◽

On Chip ◽

Application Specific

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Application-specific 3D Network-on-Chip design using simulated allocation

2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC) ◽

10.1109/aspdac.2010.5419830 ◽

2010 ◽

Cited By ~ 4

Author(s):

Pingqiang Zhou ◽

Ping-Hung Yuh ◽

Sachin S. Sapatnekar

Keyword(s):

Network On Chip ◽

Chip Design ◽

3D Network ◽

On Chip ◽

Application Specific

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Power-Aware Topology Generation Based on Clustering for Application-Specific Network on Chip

Lecture Notes in Electrical Engineering - IAENG Transactions on Engineering Technologies ◽

10.1007/978-94-007-4786-9_11 ◽

2012 ◽

pp. 135-149

Author(s):

Fen Ge ◽

Ning Wu

Keyword(s):

Network On Chip ◽

Topology Generation ◽

On Chip ◽

Application Specific

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Fault-Tolerant Application-Specific Network-on-Chip Design using Discrete Particle Swarm Optimization

2019 14th Conference on Industrial and Information Systems (ICIIS) ◽

10.1109/iciis47346.2019.9063339 ◽

2019 ◽

Author(s):

P. Veda Bhanu ◽

J. Soumya

Keyword(s):

Particle Swarm Optimization ◽

Fault Tolerant ◽

Particle Swarm ◽

Network On Chip ◽

Discrete Particle Swarm Optimization ◽

Chip Design ◽

Swarm Optimization ◽

Discrete Particle ◽

On Chip ◽

Application Specific

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Genetic algorithm based topology generation for application specific Network-on-Chip

Proceedings of 2010 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.2010.5537952 ◽

2010 ◽

Cited By ~ 4

Author(s):

Naveen Choudhary ◽

M. S. Gaur ◽

V. Laxmi ◽

V. Singh

Keyword(s):

Genetic Algorithm ◽

Network On Chip ◽

Topology Generation ◽

On Chip ◽

Application Specific

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Implementation of Application Specific Network-On-Chip Architectures on Reconfigurable Device Using Topology Generation Algorithm with Genetic Algorithm Based Optimization Technique

Wireless Networks and Computational Intelligence - Communications in Computer and Information Science ◽

10.1007/978-3-642-31686-9_51 ◽

2012 ◽

pp. 436-445 ◽

Cited By ~ 1

Author(s):

Maheswari M. ◽

Seetharaman G.

Keyword(s):

Genetic Algorithm ◽

Optimization Technique ◽

Network On Chip ◽

Generation Algorithm ◽

Topology Generation ◽

On Chip ◽

Reconfigurable Device ◽

Application Specific

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Low Power Low Latency Floorplan‐aware Path Synthesis in Application-Specific Network-on-Chip Design

Integration ◽

10.1016/j.vlsi.2017.02.010 ◽

2017 ◽

Vol 58 ◽

pp. 167-188 ◽

Cited By ~ 2

Author(s):

Priyajit Mukherjee ◽

Santanu Chattopadhyay

Keyword(s):

Low Power ◽

Network On Chip ◽

Low Latency ◽

Chip Design ◽

On Chip ◽

Path Synthesis ◽

Application Specific

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Voltage island-driven power optimization for application specific network-on-chip design

Proceedings of the great lakes symposium on VLSI - GLSVLSI '12 ◽

10.1145/2206781.2206823 ◽

2012 ◽

Cited By ~ 4

Author(s):

Kan Wang ◽

Sheqin Dong ◽

Satoshi Goto

Keyword(s):

Power Optimization ◽

Network On Chip ◽

Chip Design ◽

On Chip ◽

Application Specific

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A Novel Custom Topology Generation for Application Specific Network-on-chip Using Genetic Algorithm Optimization Technique

Journal of Artificial Intelligence ◽

10.3923/jai.2013.8.21 ◽

2012 ◽

Vol 6 (1) ◽

pp. 8-21

Author(s):

M. Maheswari

Keyword(s):

Genetic Algorithm ◽

Optimization Technique ◽

Network On Chip ◽

Algorithm Optimization ◽

Genetic Algorithm Optimization ◽

Topology Generation ◽

On Chip ◽

Application Specific

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FILA: Fault-Model for Interconnection Links in Application-Specific Network-on-Chip Design

2020 IEEE International Symposium on Circuits and Systems (ISCAS) ◽

10.1109/iscas45731.2020.9181268 ◽

2020 ◽

Author(s):

P. Veda Bhanu ◽

Chetan Vudadha ◽

J. Soumya

Keyword(s):

Fault Model ◽

Network On Chip ◽

Chip Design ◽

On Chip ◽

Application Specific

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Application-Specific Heterogeneous Network-on-Chip Design

The Computer Journal ◽

10.1093/comjnl/bxt011 ◽

2013 ◽

Vol 57 (8) ◽

pp. 1117-1131 ◽

Cited By ~ 2

Author(s):

D. Demirbas ◽

I. Akturk ◽

O. Ozturk ◽

U. Gudukbay

Keyword(s):

Heterogeneous Network ◽

Network On Chip ◽

Chip Design ◽

On Chip ◽

Application Specific

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