High mobility strained Ge PMOSFETs with high- gate dielectric and metal gate on Si substrate

2008 ◽  
Vol 44 (3) ◽  
pp. 240 ◽  
Author(s):  
J.P. Donnelly ◽  
D.Q. Kelly ◽  
D.I. Garcia-Gutierrez ◽  
M. José-Yacamán ◽  
S.K. Banerjee
Keyword(s):  
Gate Dielectric ◽  
High Mobility ◽  
Si Substrate ◽  
Metal Gate

Si-substrate-based High Mobility Ge-pMOSFETs Using Ozone Passivated Al2O3/GeOx Gate Dielectric

2014 ◽  
Author(s):  
S.K. Wang ◽  
X. Yang ◽  
Z. Gong ◽  
R. Liang ◽  
B. Sun ◽  
...  
Keyword(s):  
Gate Dielectric ◽  
High Mobility ◽  
Si Substrate

Effect of High Temperature Forming Gas Annealing on Electrical Properties of 4H-SiC Lateral MOSFETs with Lanthanum Silicate and ALD SiO2 Gate Dielectric

2018 ◽  
Vol 924 ◽  
pp. 482-485
Author(s):  
Min Seok Kang ◽  
Kevin Lawless ◽  
Bong Mook Lee ◽  
Veena Misra
Keyword(s):  
Threshold Voltage ◽  
Interfacial Layer ◽  
Field Effect ◽  
Lanthanum Oxide ◽  
Gate Dielectric ◽  
High Mobility ◽  
High Threshold ◽  
Field Effect Mobility ◽  
The Impact ◽  
Lanthanum Silicate

We investigated the impact of an initial lanthanum oxide (La2O3) thickness and forming gas annealing (FGA) conditions on the MOSFET performance. The FGA has been shown to dramatically improve the threshold voltage (VT) stability of 4H-SiC MOSFETs. The FGA process leads to low VTshift and high field effect mobility due to reduction of the interface states density as well as traps by passivating the dangling bonds and active traps in the Lanthanum Silicate dielectrics. By optimizing the La2O3interfacial layer thickness and FGA condition, SiC MOSFETs with high threshold voltage and high mobility while maintaining minimal VTshift are realized.

Dual Work Function CMOS Gate Technology Based on Metal Interdiffusion

2001 ◽  
Vol 670 ◽  
Author(s):  
Igor Polishchuk ◽  
Pushkar Ranade ◽  
Tsu-Jae King ◽  
Chenming Hu
Keyword(s):  
Gate Dielectric ◽  
New Technology ◽  
Cmos Technology ◽  
Dielectric Surface ◽  
Metal Gate ◽  
Gate Electrodes ◽  
Mos Devices ◽  
Low Threshold ◽  
Work Functions ◽  
Electrical Reliability

ABSTRACTIn this paper we propose a new metal-gate CMOS technology that uses a combination of two metals to achieve a low threshold voltage for both n- and p-MOSFET's. One of the gate electrodes is formed by metal interdiffusion so that no metal has to be etched away from the gate dielectric surface. Consequently, this process does not compromise the integrity and electrical reliability of the gate dielectric. This new technology is demonstrated for the Ti-Ni metal combination that produces gate electrodes with 3.9 eV and 5.3 eV work functions for n-MOS and p-MOS devices respectively.

Evaluation of LPCVD SiNx Gate Dielectric Reliability by TDDB Measurement in Si-Substrate-Based AlGaN/GaN MIS-HEMT

2018 ◽  
Vol 65 (5) ◽  
pp. 1759-1764 ◽  
Author(s):  
Yongle Qi ◽  
Yumeng Zhu ◽  
Jiang Zhang ◽  
Xinpeng Lin ◽  
Kai Cheng ◽  
...  
Keyword(s):  
Gate Dielectric ◽  
Si Substrate

scholarly journals High-Mobility Inkjet-Printed Indium-Gallium-Zinc-Oxide Thin-Film Transistors Using Sr-Doped Al2O3 Gate Dielectric

Materials ◽  
2019 ◽  
Vol 12 (6) ◽  
pp. 852 ◽  
Author(s):  
Seungbeom Choi ◽  
Kyung-Tae Kim ◽  
Sung Park ◽  
Yong-Hoon Kim
Keyword(s):  
Thin Film ◽  
Zinc Oxide ◽  
Thin Film Transistors ◽  
Gate Dielectric ◽  
High Mobility ◽  
Oxide Thin Film ◽  
Indium Gallium Zinc Oxide ◽  
Linear Type ◽  
Channel Layer ◽  
Indium Gallium

In this paper, we demonstrate high-mobility inkjet-printed indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs) using a solution-processed Sr-doped Al2O3 (SAO) gate dielectric. Particularly, to enhance to the electrical properties of inkjet-printed IGZO TFTs, a linear-type printing pattern was adopted for printing the IGZO channel layer. Compared to dot array printing patterns (4 × 4 and 5 × 5 dot arrays), the linear-type pattern resulted in the formation of a relatively thin and uniform IGZO channel layer. Also, to improve the subthreshold characteristics and low-voltage operation of the device, a high-k and thin (~10 nm) SAO film was used as the gate dielectric layer. Compared to the devices with SiO2 gate dielectric, the inkjet-printed IGZO TFTs with SAO gate dielectric exhibited substantially high field-effect mobility (30.7 cm2/Vs). Moreover, the subthreshold slope and total trap density of states were also significantly reduced to 0.14 V/decade and 8.4 × 1011/cm2·eV, respectively.

High mobility p-channel germanium MOSFETs with a thin Ge oxynitride gate dielectric

2003 ◽  
Author(s):  
Huiling Shang ◽  
H. Okorn-Schmidt ◽  
K.K. Chan ◽  
M. Copel ◽  
J.A. Ott ◽  
...  
Keyword(s):  
Gate Dielectric ◽  
High Mobility
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