Low power high precision current memory integrator for analogue sigma-delta modulator

1998 ◽  
Vol 34 (17) ◽  
pp. 1624 ◽  
Author(s):  
G. Fayolle ◽  
A. Kaiser
Keyword(s):  
Low Power ◽  
High Precision ◽  
Sigma Delta Modulator ◽  
Sigma Delta

DESIGNING LOW POWER OF SIGMA DELTA MODULATOR FOR BIOMEDICAL APPLICATION

2005 ◽  
Vol 17 (04) ◽  
pp. 181-185 ◽  
Author(s):  
HO-YIN LEE ◽  
CHEN-MING HSU ◽  
SHENG-CHIA HUANG ◽  
YI-WEI SHIH ◽  
CHING-HSING LUO
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Biomedical Application ◽  
Loop Filter ◽  
Biomedical Signal ◽  
Sigma Delta Modulator ◽  
Sigma Delta ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Power Application

This paper discusses the design of micro power Sigma-delta modulator with oversampling technology. This Sigma-delta modulator design is paid special attention to its low power application of portable electronic system in digitizing biomedical signals such as Electro-cardiogram (ECG), Electroencephalogram (EEG) etc. [1]. A high performance, low power second order Sigma-delta modulator is more useful in analog signal acquisition system. Using Sigma-delta modulator can reduce the power consumption and cost in the whole system. The original biomedical signal can be reconstructed by simply applying the digital bit stream from the modulator output through a low-pass filter. The loop filter of this modulator has been implemented by using switch capacitor (SC) integrators and using simple circuitry consists of OpAmps, Comparator and DAC. In general, the resolution of modulator is about 10 bits for biomedical application. In this two order Sigma-delta modulator simulation results of the 1.8V sigma delta modulator show a 68 dB signal-to-noise-and-distortion ratio (SNDR) in 4 kHz biomedical signal bandwidth and a sampling frequency equal to 1 MHz in the 0.18 μ m CMOS technology. The power consumption is 400 μ W. It is very suitable for low power application of biomedical instrument design.

AN EFFICIENT LOW-POWER SIGMA-DELTA MODULATOR FOR MULTI-STANDARD WIRELESS APPLICATIONS

2012 ◽  
Vol 21 (04) ◽  
pp. 1250028 ◽  
Author(s):  
B. HODA SEYEDHOSSEINZADEH ◽  
MOHAMMAD YAVARI
Keyword(s):  
Low Power ◽  
Power Supply ◽  
Cmos Technology ◽  
System Level ◽  
Sigma Delta Modulator ◽  
Sigma Delta ◽  
Wireless Applications ◽  
Design And Implementation ◽  
Simulation Results ◽  
System Level Simulations

This paper describes the design and implementation of a reconfigurable low-power sigma-delta modulator (SDM) for multi-standard wireless communications in a 90 nm CMOS technology. Both architectural and circuital reconfigurations are used to adapt the performance of the modulator to multi-standard applications. The feasibility of the presented solution is demonstrated using system-level simulations as well as transistor-level simulations of the modulator. HSPICE simulation results show that the proposed modulator achieves 76.8/78.9/80.8/85/89.5 dB peak signal-to-noise plus distortion ratio (SNDR) within the standards WiFi, WiMAX, WCDMA, Bluetooth and GSM with the bandwidth of 12.5 MHz, 10 MHz, 1.92 MHz, 0.5 MHz, and 250 kHz, respectively, under the power consumption of 37/37/12/5/5 mW using a single 1 V power supply.

A 15 Bit 95 dB Low Power Discrete Time Sigma Delta Modulator

2012 ◽  
Author(s):  
Mohammed Arifuddin Sohel ◽  
K. Chenna Keshava Reddy ◽  
Syed Abdul Sattar ◽  
Salma Jabeen
Keyword(s):  
Low Power ◽  
Discrete Time ◽  
Sigma Delta Modulator ◽  
Sigma Delta
Sign in / Sign up

Export Citation Format

Share Document