Room-temperature resonant tunnelling bipolar transistor XNOR and XOR integrated circuits

1993 ◽  
Vol 29 (20) ◽  
pp. 1802 ◽  
Author(s):  
A.C. Seabaugh ◽  
A.H. Taddiken ◽  
E.A. Beam ◽  
J.N. Randall ◽  
Y.-C Kao ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Room Temperature ◽  
Bipolar Transistor ◽  
Resonant Tunnelling

TEM study of phosphorus-implanted pseudomorphic Si0.88Ge0.12 on Si(100)

1995 ◽  
Vol 53 ◽  
pp. 468-469
Author(s):  
N. David Theodore ◽  
Donald Y.C Lie ◽  
J. H. Song ◽  
Peter Crozier
Keyword(s):  
Integrated Circuits ◽  
Heterojunction Bipolar Transistors ◽  
Integrated Circuit ◽  
High Speed ◽  
Room Temperature ◽  
Strain Relaxation ◽  
Bipolar Transistors ◽  
Sige Hbt ◽  
Integrated Circuit Manufacturing ◽  
Microstructural Behavior

SiGe is being extensively investigated for use in heterojunction bipolar-transistors (HBT) and high-speed integrated circuits. The material offers adjustable bandgaps, improved carrier mobilities over Si homostructures, and compatibility with Si-based integrated-circuit manufacturing. SiGe HBT performance can be improved by increasing the base-doping or by widening the base link-region by ion implantation. A problem that arises however is that implantation can enhance strain-relaxation of SiGe/Si.Furthermore, once misfit or threading dislocations result, the defects can give rise to recombination-generation in depletion regions of semiconductor devices. It is of relevance therefore to study the damage and anneal behavior of implanted SiGe layers. The present study investigates the microstructural behavior of phosphorus implanted pseudomorphic metastable Si0.88Ge0.12 films on silicon, exposed to various anneals.Metastable pseudomorphic Si0.88Ge0.12 films were grown ~265 nm thick on a silicon wafer by molecular-beam epitaxy. Pieces of this wafer were then implanted at room temperature with 100 keV phosphorus ions to a dose of 1.5×1015 cm-2.

High Temperature High Current Gain IC Compatible 4H-SiC Phototransistor

2019 ◽  
Vol 963 ◽  
pp. 832-836 ◽  
Author(s):  
Shuo Ben Hou ◽  
Per Erik Hellström ◽  
Carl Mikael Zetterling ◽  
Mikael Östling
Keyword(s):  
High Temperature ◽  
Integrated Circuits ◽  
Room Temperature ◽  
Uv Light ◽  
Optical Power ◽  
Current Gain ◽  
High Current ◽  
Promising Candidate ◽  
Forward Current ◽  
On Chip

This paper presents our in-house fabricated 4H-SiC n-p-n phototransistors. The wafer mapping of the phototransistor on two wafers shows a mean maximum forward current gain (βFmax) of 100 at 25 °C. The phototransistor with the highest βFmax of 113 has been characterized from room temperature to 500 °C. βFmax drops to 51 at 400 °C and remains the same at 500 °C. The photocurrent gain of the phototransistor is 3.9 at 25 °C and increases to 14 at 500 °C under the 365 nm UV light with the optical power of 0.31 mW. The processing of the phototransistor is same to our 4H-SiC-based bipolar integrated circuits, so it is a promising candidate for 4H-SiC opto-electronics on-chip integration.

Silk Polymer Coating with Low Dielectric Constant and High Thermal Stability for Ulsi Interlayer Dielectric

1997 ◽  
Vol 476 ◽  
Author(s):  
P. H. Townsend ◽  
S. J. Martin ◽  
J. Godschalx ◽  
D. R. Romer ◽  
D. W. Smith ◽  
...  
Keyword(s):  
Thin Film ◽  
Dielectric Constant ◽  
Glass Transition ◽  
Transition Temperature ◽  
Glass Transition Temperature ◽  
Integrated Circuits ◽  
Room Temperature ◽  
Polymer Network ◽  
Flow Characteristics ◽  
Interlayer Dielectric

AbstractA novel polymer has been developed for use as a thin film dielectric in the interconnect structure of high density integrated circuits. The coating is applied to the substrate as an oligomeric solution, SiLK*, using conventional spin coating equipment and produces highly uniform films after curing at 400 °C to 450 °C. The oligomeric solution, with a viscosity of ca. 30 cPs, is readily handled on standard thin film coating equipment. Polymerization does not require a catalyst. There is no water evolved during the polymerization. The resulting polymer network is an aromatic hydrocarbon with an isotropie structure and contains no fluorine.The properties of the cured films are designed to permit integration with current ILD processes. In particular, the rate of weight-loss during isothermal exposures at 450 °C is ca. 0.7 wt.%/hour. The dielectric constant of cured SiLK has been measured at 2.65. The refractive index in both the in-plane and out-of-plane directions is 1.63. The flow characteristics of SiLK lead to broad topographic planarization and permit the filling of gaps at least as narrow as 0.1 μm. The glass transition temperature for the fully cured film is greater than 490 °C. The coefficient of thermal expansivity is 66 ppm/°C below the glass transition temperature. The stress in fully cured films on Si wafers is ca. 60 MPa at room temperature. The fracture toughness measured on thin films is 0.62 MPa m ½. Thin coatings absorb less than 0.25 wt.% water when exposed to 80% relative humidity at room temperature.

HIGH SPEED DIGITAL CIRCUIT TECHNOLOGY

1995 ◽  
Vol 06 (01) ◽  
pp. 163-210 ◽  
Author(s):  
STEPHEN I. LONG
Keyword(s):  
Integrated Circuits ◽  
Low Power ◽  
Material Properties ◽  
High Speed ◽  
Digital Circuit ◽  
Bipolar Transistor ◽  
Clock Frequency ◽  
Digital Integrated Circuits ◽  
Heterojunction Devices ◽  
Circuit Technology

The performance of high speed digital integrated circuits, defined here as those requiring operation at high clock frequency, is generally more sensitive to material properties and process techniques than ICs used at lower frequencies. Obtaining high speed and low power concurrently is especially challenging. Circuit architectures must be selected for the device and application appropriately. This paper presents simple models for high speed digital IC performance and applies these to the FET and bipolar transistor. Heterojunction devices are compared with those using single or binary materials. Circuits for high speed SSI and low power VLSI applications are described, and their performance is surveyed.

scholarly journals Integration of Single-Photon Emitters in 2D Materials with Plasmonic Waveguides at Room Temperature

Nanomaterials ◽  
2020 ◽  
Vol 10 (9) ◽  
pp. 1663
Author(s):  
Kwang-Yong Jeong ◽  
Seong Won Lee ◽  
Jae-Hyuck Choi ◽  
Jae-Pil So ◽  
Hong-Gyu Park
Keyword(s):  
Integrated Circuits ◽  
Room Temperature ◽  
Single Photon ◽  
Hexagonal Boron Nitride ◽  
Photon Emission ◽  
Plasmonic Waveguide ◽  
Practical Implementation ◽  
Plasmonic Waveguides ◽  
Time Resolved ◽  
Ag Nanowire

Efficient integration of a single-photon emitter with an optical waveguide is essential for quantum integrated circuits. In this study, we integrated a single-photon emitter in a hexagonal boron nitride (h-BN) flake with a Ag plasmonic waveguide and measured its optical properties at room temperature. First, we performed numerical simulations to calculate the efficiency of light coupling from the emitter to the Ag plasmonic waveguide, depending on the position and polarization of the emitter. In the experiment, we placed a Ag nanowire, which acted as the plasmonic waveguide, near the defect of the h-BN, which acted as the single-photon emitter. The position and direction of the nanowire were precisely controlled using a stamping method. Our time-resolved photoluminescence measurement showed that the single-photon emission from the h-BN flake was enhanced to almost twice the intensity as a result of the coupling with the Ag nanowire. We expect these results to pave the way for the practical implementation of on-chip nanoscale quantum plasmonic integrated circuits.

Quantum well resonant tunneling bipolar transistor operating at room temperature

1986 ◽  
Author(s):  
F. Capasso ◽  
S. Sen ◽  
A.C. Gossard ◽  
A.L. Hutchinson ◽  
J.H. English
Keyword(s):  
Quantum Well ◽  
Resonant Tunneling ◽  
Room Temperature ◽  
Bipolar Transistor
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