High-temperature operation of junction field-effect transistors in the forward-bias mode

1966 ◽  
Vol 2 (7) ◽  
pp. 266
Author(s):  
G.M. Ettinger ◽  
P. Joslin
Keyword(s):  
High Temperature ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Forward Bias ◽  
High Temperature Operation ◽  
Junction Field Effect Transistors

High-Temperature Operation of Diamond Junction Field-Effect Transistors With Lateral p-n Junctions

2013 ◽  
Vol 34 (9) ◽  
pp. 1175-1177 ◽  
Author(s):  
Takayuki Iwasaki ◽  
Yuto Hoshino ◽  
Kohei Tsuzuki ◽  
Hiromitsu Kato ◽  
Toshiharu Makino ◽  
...  
Keyword(s):  
High Temperature ◽  
Field Effect ◽  
Field Effect Transistors ◽  
High Temperature Operation ◽  
Junction Field Effect Transistors

Extended High-Temperature Operation of Silicon Carbide CMOS Circuits for Venus Surface Application

2016 ◽  
Vol 13 (4) ◽  
pp. 143-154 ◽  
Author(s):  
Jim Holmes ◽  
A. Matthew Francis ◽  
Ian Getreu ◽  
Matthew Barlow ◽  
Affan Abbasi ◽  
...  
Keyword(s):  
High Temperature ◽  
Integrated Circuits ◽  
Integrated Circuit ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Logic Synthesis ◽  
Oxide Semiconductor ◽  
Cmos Process ◽  
Timing Models ◽  
High Temperature Operation

In the last decade, significant effort has been expended toward the development of reliable, high-temperature integrated circuits. Designs based on a variety of active semiconductor devices including junction field-effect transistors and metal-oxide-semiconductor (MOS) field-effect transistors have been pursued and demonstrated. More recently, advances in low-power complementary MOS (CMOS) devices have enabled the development of highly integrated digital, analog, and mixed-signal integrated circuits. The results of elevated temperature testing (as high as 500°C) of several building block circuits for extended periods (up to 100 h) are presented. These designs, created using the Raytheon UK's HiTSiC® CMOS process, present the densest, lowest-power integrated circuit technology capable of operating at extreme temperatures for any period. Based on these results, Venus nominal temperature (470°C) transistor models and gate-level timing models were created using parasitic extracted simulations. The complete CMOS digital gate library is suitable for logic synthesis and lays the foundation for complex integrated circuits, such as a microcontroller. A 16-bit microcontroller, based on the OpenMSP 16-bit core, is demonstrated through physical design and simulation in SiC-CMOS, with an eye for Venus as well as terrestrial applications.

High-Temperature Operation of Normally Off-Mode AlGaN/GaN Heterostructure Field-Effect Transistors with p-GaN Gate

2011 ◽  
Vol 50 (1S1) ◽  
pp. 01AD03 ◽  
Author(s):  
Takayuki Sugiyama ◽  
Hiroshi Amano ◽  
Daisuke Iida ◽  
Motoaki Iwaya ◽  
Satoshi Kamiyama ◽  
...  
Keyword(s):  
High Temperature ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Heterostructure Field Effect Transistors ◽  
Gan Heterostructure ◽  
High Temperature Operation

Junction Field Effect Transistors For High-Temperature Or High-Power Electronics

1997 ◽  
Vol 483 ◽  
Author(s):  
J. C. Zolperw
Keyword(s):  
High Temperature ◽  
High Power ◽  
Field Effect ◽  
Elevated Temperatures ◽  
Field Effect Transistors ◽  
Current Gain ◽  
Semiconductor Interface ◽  
Transistor Channel ◽  
Semiconductor Junction ◽  
Junction Field Effect Transistors

AbstractJunction field effect transistors (JFETs) are attractive for high-temperature or highpower operation since they rely on a buried semiconductor junction, and not a metal semiconductor interface as in a metal semiconductor (MESFET) or heterojunction field effect transistor (HFET), for modulating the transistor channel. This is important since a metal/semiconductor interface often degrades at elevated temperatures, either due to the ambient temperature or to Joule heating at high current levels, while a buried semiconductor junction can withstand higher temperatures. In fact, for proper design, the JFET becomes limited by thermal carrier generation in the semiconductor and not metallurgical degradation of the gate electrode.In this talk an overview is given of JFET technology based on GaAs, SiC, and GaN. While impressive room temperature, high-frequency, results have been reported for GaAs JFET's with unit current gain cut-off frequencies up to 50 GHz, more work is needed to limit substrate conduction for optimum operation at 300 °C and above. For SiC JFETs, well behaved transistor operation has been maintained up to 600 °C, however, increased frequency performance is needed. More recently, a GaN JFET has also been demonstrated that is promising for similarly high temperature operation but is presently limited by buffer conduction. Future directions for each of these technologies, and potential extension to high power switching devices such as thyristors, will be presented at the conference.

10 kV, 87 mΩcm2 Normally-Off 4H-SiC Vertical Junction Field-Effect Transistors

2006 ◽  
Vol 527-529 ◽  
pp. 1187-1190 ◽  
Author(s):  
Yu Zhu Li ◽  
Petre Alexandrov ◽  
Jian Hui Zhang ◽  
Larry X. Li ◽  
Jian Hui Zhao
Keyword(s):  
High Temperature ◽  
High Power ◽  
Field Effect ◽  
Field Effect Transistors ◽  
High Current Density ◽  
Gate Oxide ◽  
High Current ◽  
Oxide Reliability ◽  
Blocking Voltage ◽  
Junction Field Effect Transistors

SiC JFET, compared with SiC MOSFET, is attractive for high power, high temperature applications because it is free of gate oxide reliability issues. Trenched-and-Implanted VJFET (TIVJFET) does not require epi-regrowth and is capable of high current density. In this work we demonstrate two trenched-and-implanted normally-off 4H-SiC vertical junction field-effect transistors (TI-VJFET), based on 120μm, 4.9×1014cm-3 and 100μm, 6×1014cm-3 drift layers. The corresponding devices showed blocking voltage (VB) of 11.1kV and specific on-resistance (RSP_ON) of 124m7cm2, and VB of 10kV and RSP_ON of 87m7cm2. A record-high value for VB 2/RSP_ON of 1149MW/cm2 was achieved for normally-off SiC FETs.

High-Temperature Operation of Pentacene Field-Effect Transistors with Polyimide Gate Insulators

2005 ◽  
Vol 871 ◽  
Author(s):  
Tsuyoshi Sekitani ◽  
Shingo Iba ◽  
Yusaku Kato ◽  
Yoshiaki Noguchi ◽  
Takao Someya ◽  
...  
Keyword(s):  
High Temperature ◽  
Field Effect ◽  
Room Temperature ◽  
Gate Dielectric ◽  
Field Effect Transistors ◽  
Current Ratio ◽  
Excellent Thermal Stability ◽  
Annealing Temperatures ◽  
High Temperature Operation ◽  
Thermal Stability Of

AbstractWe have fabricated pentacene field-effect transistors (FETs) on polyimide-sheet films with polyimide gate dielectric layers and parylene encapsulation layer, and investigated the high-temperature performance. It is found that the mobility of encapsulated FETs is enhanced from 0.5 to 0.8 cm2/Vs when the device is heated from room temperature to 160°C under light-shielding nitrogen environment. Furthermore, after the removal of annealing temperatures up to 160°C, the transistor characteristic of mobility and on/off current ratio show no significant changes, demonstration the excellent thermal stability of the present organic FETs.

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