Efficient March test algorithm for 1T1R cross‐bar with complete fault coverage

2016 ◽  
Vol 52 (18) ◽  
pp. 1520-1522 ◽  
Author(s):  
Peng Liu ◽  
Zhiqiang You ◽  
Jishun Kuang ◽  
Zhipeng Hu ◽  
Heng Duan ◽  
...  
Keyword(s):  
Fault Coverage ◽  
March Test ◽  
Test Algorithm

scholarly journals Construction and application of march tests for pattern sensitive memory faults detection

Informatics ◽  
2021 ◽  
Vol 18 (1) ◽  
pp. 25-42
Author(s):  
V. N. Yarmolik ◽  
V. A. Levantsevich ◽  
D. V. Demenkovets ◽  
I. Mrozek
Keyword(s):  
Fault Detection ◽  
Multiple Testing ◽  
High Efficiency ◽  
Fault Coverage ◽  
Memory Cells ◽  
March Test ◽  
Storage Devices ◽  
Coupon Collector ◽  
March Tests ◽  
Analytical Expressions

The urgency of the problem of testing storage devices of modern computer systems is shown. The mathematical models of their faults and the methods used for testing the most complex cases by classical march tests are investigated. Passive pattern sensitive faults (PNPSFk) are allocated, in which arbitrary k from N memory cells participate, where k << N, and N is the memory capacity in bits. For these faults, analytical expressions are given for the minimum and maximum fault coverage that is achievable within the march tests. The concept of a primitive is defined, which describes in terms of march test elements the conditions for activation and fault detection of PNPSFk of storage devices. Examples of march tests with maximum fault coverage, as well as march tests with a minimum time complexity equal to 18N are given. The efficiency of a single application of tests such as MATS ++, March C− and March PS is investigated for different number of k ≤ 9 memory cells involved in PNPSFk fault. The applicability of multiple testing with variable address sequences is substantiated, when the use of random sequences of addresses is proposed. Analytical expressions are given for the fault coverage of complex PNPSFk faults depending on the multiplicity of the test. In addition, the estimates of the mean value of the multiplicity of the MATS++, March C− and March PS tests, obtained on the basis of a mathematical model describing the problem of the coupon collector, and ensuring the detection of all k2k PNPSFk faults are given. The validity of analytical estimates is experimentally shown and the high efficiency of PNPSFk fault detection is confirmed by tests of the March PS type.

Two-Run RAM March Testing with Address Decimation

2016 ◽  
Vol 26 (02) ◽  
pp. 1750031 ◽  
Author(s):  
Ireneusz Mrozek ◽  
Vyacheslav Yarmolik
Keyword(s):  
Selection Process ◽  
Random Access ◽  
Test Session ◽  
Analytical Investigation ◽  
Fault Coverage ◽  
Test Procedures ◽  
March Test ◽  
Sequence Selection ◽  
Time Standard ◽  
March Tests

Conventional march memory tests have high fault coverage, especially for simple faults like stack-at fault (SAF), transition fault (TF) or coupling fault (CF). The same-time standard march tests, which are based on only one run, are becoming insufficient for complex faults like pattern-sensitive faults (PSFs). To increase fault coverage, the multi-run transparent march test algorithms have been used. This solution is especially suitable for built-in self-test (BIST) implementation. The transparent BIST approach presents the incomparable advantage of preserving the content of the random access memory (RAM) after testing. We do not need to save the memory content before the test session or to restore it at the end of the session. Therefore, these techniques are widely used in critical applications (medical electronics, railway control, avionics, telecommunications, etc.) for periodic testing in the field. Unfortunately, in many cases, there is very limited time for such test sessions. Taking into account the above limitations, we focus on short, two-run march test procedures based on counter address sequences. The advantage of this paper is that it defines requirements that must be taken into account in the address sequence selection process and presents a deeply analytical investigation of the optimal address decimation parameter. From the experiments we can conclude that the fault coverage of the test sessions generated according to the described method is higher than in the case of pseudorandom address sequences. Moreover, the benefit of this solution seems to be low hardware overhead in implementation of an address generator.

scholarly journals Analysis of multibackground memory testing techniques

2010 ◽  
Vol 20 (1) ◽  
pp. 191-205 ◽  
Author(s):  
Ireneusz Mrozek
Keyword(s):  
Initial Conditions ◽  
Fault Coverage ◽  
Fault Model ◽  
Memory Testing ◽  
March Test ◽  
Transition Faults ◽  
Complex Fault ◽  
Pattern Sensitive Faults ◽  
Testing Techniques ◽  
March Tests

Analysis of multibackground memory testing techniquesMarch tests are widely used in the process of RAM testing. This family of tests is very efficient in the case of simple faults such as stuck-at or transition faults. In the case of a complex fault model—such as pattern sensitive faults—their efficiency is not sufficient. Therefore we have to use other techniques to increase fault coverage for complex faults. Multibackground memory testing is one of such techniques. In this case a selected March test is run many times. Each time it is run with new initial conditions. One of the conditions which we can change is the initial memory background. In this paper we compare the efficiency of multibackground tests based on four different algorithms of background generation.

scholarly journals Fault Detection with Optimum March Test Algorithm

2012 ◽  
Author(s):  
Nor Azura Zakaria ◽  
W.Z.W. Hasan ◽  
I.A. Halin ◽  
R.M. Sidek ◽  
Xiaoqing Wen
Keyword(s):  
Fault Detection ◽  
March Test ◽  
Test Algorithm

Defect Analysis and Parallel March Test Algorithm for 3D Hybrid CMOS-Memristor Memory

2018 ◽  
Author(s):  
Peng Liu ◽  
Jigang Wu ◽  
Zhiqiang You ◽  
Michael Elimu ◽  
Weizheng Wang ◽  
...  
Keyword(s):  
Defect Analysis ◽  
March Test ◽  
Hybrid Cmos ◽  
Test Algorithm
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