scholarly journals Dual channel time‐to‐digital converter module with 10 ps resolution and 320 ns full scale range

2015 ◽  
Vol 51 (13) ◽  
pp. 994-996 ◽  
Author(s):  
D. Tamborini ◽  
D. Portaluppi ◽  
F. Villa ◽  
F. Zappa
Keyword(s):  
Full Scale ◽  
Digital Converter ◽  
Time To Digital Converter ◽  
Dual Channel ◽  
Scale Range

scholarly journals Multichannel low power time-to-digital converter card with 21 ps precision and full scale range up to 10 μs

2014 ◽  
Vol 85 (11) ◽  
pp. 114703 ◽  
Author(s):  
D. Tamborini ◽  
D. Portaluppi ◽  
F. Villa ◽  
S. Tisa ◽  
A. Tosi
Keyword(s):  
Low Power ◽  
Full Scale ◽  
Digital Converter ◽  
Time To Digital Converter ◽  
Scale Range

A resource-saving dual channel time-to-digital converter with shared tapped delay line in FPGAs

2021 ◽  
Vol 16 (01) ◽  
pp. P01012-P01012
Author(s):  
Y. Jiao ◽  
Q. Zhang ◽  
W. Chen ◽  
L. Zhou ◽  
C. Chen
Keyword(s):  
Delay Line ◽  
Digital Converter ◽  
Resource Saving ◽  
Time To Digital Converter ◽  
Dual Channel

scholarly journals A Low-Power Time-to-Digital Converter for the CMS Endcap Timing Layer (ETL) Upgrade

2021 ◽  
pp. 1-1
Author(s):  
Wei Zhang ◽  
Hanhan Sun ◽  
Christopher Edwards ◽  
Datao Gong ◽  
Xing Huang ◽  
...  
Keyword(s):  
Low Power ◽  
Digital Converter ◽  
Time To Digital Converter

Free running time to digital converter with 1 nanosecond resolution

1988 ◽  
Vol 35 (1) ◽  
pp. 184-186 ◽  
Author(s):  
M.A. Thompson ◽  
M.W. Werner ◽  
R.R. Egan ◽  
P.D. Coan ◽  
P.E. Robl
Keyword(s):  
Digital Converter ◽  
Running Time ◽  
Time To Digital Converter ◽  
Free Running
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