Passive frequency compensation for high gain‐bandwidth and high slew‐rate two‐stage OTA

2014 ◽  
Vol 50 (9) ◽  
pp. 657-659 ◽  
Author(s):  
A. Mirvakili ◽  
V.J. Koomson
Keyword(s):  
High Gain ◽  
Slew Rate ◽  
Frequency Compensation ◽  
Two Stage ◽  
Gain Bandwidth

A QFGMOS-Based gm-Boosted and Adaptively Biased Two-Stage Amplifier Offering Very High Gain and High Bandwidth

2021 ◽  
pp. 2250056
Author(s):  
Urvashi Bansal ◽  
Abhilasha Bakre ◽  
Prem Kumar ◽  
Devansh Yadav ◽  
Mohit Kumar ◽  
...  
Keyword(s):  
Low Voltage ◽  
Cmos Technology ◽  
High Gain ◽  
Open Loop ◽  
Slew Rate ◽  
Two Stage ◽  
Adaptive Biasing ◽  
Unity Gain ◽  
High Bandwidth ◽  
Cmos Amplifier

A low voltage low power two-stage CMOS amplifier with high open-loop gain, high gain bandwidth product (GBW) and enhanced slew rate is presented in this work. The proposed circuit makes use of folded cascode gm-boosting cells in conjunction with a low voltage gain enhanced cascode mirror using quasi-floating gate (QFGMOS) transistors. QFGMOS transistors are also used in input pair and adaptive biasing, which facilitate large dynamic output current in the presented circuit. Consequently, the slew rate is enhanced without much increase in static power dissipation. The unity gain frequency (UGF) and dc gain of the circuit are 29.4[Formula: see text]MHz and 132[Formula: see text]dB, respectively. The amplifier is operated at 0.6[Formula: see text]V dual supply with 89[Formula: see text][Formula: see text]W power consumption and has a nearly symmetrical average slew rate of 51.5[Formula: see text]V/[Formula: see text]s. All simulations including Monte Carlo and corner analysis are carried out using 180-nm CMOS technology for validating the design with help of spice tools.

scholarly journals Design of Low Power Amplifier for Brain Signal Measurement Applications

2019 ◽  
Vol 8 (9) ◽  
pp. 686-688
Keyword(s):  
Low Power ◽  
Power Amplifier ◽  
Power Dissipation ◽  
High Gain ◽  
Instrumentation Amplifier ◽  
Slew Rate ◽  
Eeg Signals ◽  
Gain Bandwidth ◽  
Front End ◽  
Signal Measurement

This paper presents the idea of analog amplifier which amplifies the amplitude of the real time EEG signals. This amplifier is for the front end application in brain signal measurement applications. In this paper instrumentation amplifier has been used for the designing purpose. The parameters of the proposed amplifier have been analyzed in order to achieve better gain and less power dissipation. The parameters like voltage, slew rate, gain bandwidth product, and sizing of Mosfet have been analyzed to achieve high gain using Cadence Virtuoso Software.

Multistage Amplifier Using Dual-Miller with Nulling-Resistor and Dual-Feedforward Structure

2014 ◽  
Vol 989-994 ◽  
pp. 1169-1172
Author(s):  
Qian Neng Zhou ◽  
Qi Li ◽  
Jin Zhao Lin ◽  
Hong Juan Li ◽  
Chen Li ◽  
...  
Keyword(s):  
High Gain ◽  
Phase Margin ◽  
Slew Rate ◽  
Well Performance ◽  
Gain Bandwidth ◽  
Wide Bandwidth ◽  
Miller Compensation ◽  
Dc Gain ◽  
Simulation Results ◽  
Multistage Amplifier

This paper designs a high-gain wide-bandwidth multistage amplifier by employing the dual-miller compensation with nulling-resistor and dual-feedforward compensation (DMCNR-DFC) in 0.35μm BCD process. The designed DMCNR-DFC multistage amplifier achieves well performance including gain-bandwidth product (GBW) and slew rate (SR). Simulation results show that the DMCNR-DFC multistage amplifier achieves a dc gain of about 121.1dB and GBW of about 6.1MHz with 52o phase margin.

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