Large Bandgap Tuning in Corundum Al2(O1-xSex)3

2021 ◽  
Author(s):  
Xiaoli Liu ◽  
Seamus Ober ◽  
Weihua Tang ◽  
Chee-Keong Tan
Keyword(s):  
Gallium Oxide ◽  
Aluminium Oxide ◽  
Oxide Materials ◽  
Power Devices ◽  
Wide Gap ◽  
Bandgap Tuning

Wide-gap oxide materials including gallium oxide and aluminium oxide have been attracting much interest due to their tremendous potential for application in power devices. In this work, a new III-oxide...

Radiation damage in gallium oxide materials and devices

2020 ◽  
Author(s):  
S J Pearton ◽  
Fan Ren ◽  
Jihyun Kim ◽  
Michael Stavola ◽  
Alexander Y Polyakov
Keyword(s):  
Radiation Damage ◽  
Gallium Oxide ◽  
Oxide Materials

A review of the most recent progresses of state-of-art gallium oxide power devices

2019 ◽  
Vol 40 (1) ◽  
pp. 011803 ◽  
Author(s):  
Hong Zhou ◽  
Jincheng Zhang ◽  
Chunfu Zhang ◽  
Qian Feng ◽  
Shenglei Zhao ◽  
...  
Keyword(s):  
Gallium Oxide ◽  
Power Devices ◽  
State Of Art

Application of INAA for investigation of magnesium and aluminium oxide materials

2013 ◽  
Vol 298 (3) ◽  
pp. 1907-1911 ◽  
Author(s):  
Daina Riekstina ◽  
Vera Skvortsova ◽  
Olgerts Veveris
Keyword(s):  
Aluminium Oxide ◽  
Oxide Materials

scholarly journals Development of gallium oxide power devices (Phys. Status Solidi A 1∕2014)

2014 ◽  
Vol 211 (1) ◽  
Author(s):  
Masataka Higashiwaki ◽  
Kohei Sasaki ◽  
Akito Kuramata ◽  
Takekazu Masui ◽  
Shigenobu Yamakoshi
Keyword(s):  
Gallium Oxide ◽  
Power Devices

Study of water vapour adsorption kinetics on aluminium oxide materials

2017 ◽  
Author(s):  
Alesya Livanova ◽  
Evgeniy Meshcheryakov ◽  
Sergey Reshetnikov ◽  
Irina Kurzina
Keyword(s):  
Water Vapour ◽  
Adsorption Kinetics ◽  
Aluminium Oxide ◽  
Oxide Materials ◽  
Vapour Adsorption ◽  
Water Vapour Adsorption

Integration Challenges of Inorganic Low-K (K≤2.5) Materials with CU for Sub-0.25μm Multilevel Interconnects

1999 ◽  
Vol 565 ◽  
Author(s):  
K. C. Yu ◽  
J. Defilippi ◽  
R. Tiwari ◽  
T. Sparks ◽  
D. Smith ◽  
...  
Keyword(s):  
Isothermal Annealing ◽  
Process Development ◽  
Cmos Technology ◽  
Power Reduction ◽  
Oxide Materials ◽  
Power Devices ◽  
Parametric Data ◽  
Porous Oxide ◽  
Multi Level ◽  
Low K

AbstractThe recent introduction of dual inlaid Cu and oxide based interconnects within sub-0.25μm CMOS technology has delivered higher performance and lower power devices. Further speed improvements and power reduction may be achieved by reducing the interconnect parasitic capacitance through integration of low-k interlevel dielectric (ILD) materials with Cu. This paper demonstrates successful multi-level dual inlaid Cu/low-k interconnects with ILD permittivities ranging from 2.0 to 2.5. Integration challenges specific to inorganic low-k and Cu based structures are discussed. Through advanced CMP process development, multi-level integration of porous oxide materials with moduli less than 0.5 GPa is demonstrated. Parametric data and isothermal annealing of these Cu/ low-k structures show results with yield comparable to Cu/oxide based interconnects.

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