A new architecture design of Ni–Co LDH-based pseudocapacitors

2017 ◽  
Vol 5 (46) ◽  
pp. 24407-24415 ◽  
Author(s):  
Yangyang Liu ◽  
Xue Teng ◽  
Yongli Mi ◽  
Zuofeng Chen

A Cu nanowire-interweaved Ni–Co LDH pseudocapacitor is fabricated by three sequential electrochemical steps on a three-dimensional Cu foam.

2021 ◽  
Vol 57 (30) ◽  
pp. 3708-3711
Author(s):  
Hao Cheng ◽  
Cheng Gao ◽  
Ning Cai ◽  
Miao Wang

Ag coated three-dimensional Cu foam is introduced as a lithiophilic current collector to regulate the lithium deposition for Li2S-based anode-free batteries.


2019 ◽  
Vol 43 (3) ◽  
pp. 1238-1246 ◽  
Author(s):  
Duo Zhang ◽  
Chaoqi Bi ◽  
Qingliu Wu ◽  
Guangya Hou ◽  
Guoqu Zheng ◽  
...  

It is a challenge to commercialize tin dioxide-based anodes for lithium-ion batteries due to their low rate capability and poor cycling performance of the electrodes.


Electronics ◽  
2019 ◽  
Vol 8 (1) ◽  
pp. 65 ◽  
Author(s):  
Zhiqiang Liu ◽  
Paul Chow ◽  
Jinwei Xu ◽  
Jingfei Jiang ◽  
Yong Dou ◽  
...  

Three-dimensional convolutional neural networks (3D CNNs) have gained popularity in many complicated computer vision applications. Many customized accelerators based on FPGAs are proposed for 2D CNNs, while very few are for 3D CNNs. Three-D CNNs are far more computationally intensive and the design space for 3D CNN acceleration has been further expanded since one more dimension is introduced, making it a big challenge to accelerate 3D CNNs on FPGAs. Motivated by the finding that the computation patterns of 2D and 3D CNNs are very similar, we propose a uniform architecture design for accelerating both 2D and 3D CNNs in this paper. The uniform architecture is based on the idea of mapping convolutions to matrix multiplications. A customized mapping module is developed to generate the feature matrix tilings with no need to store the entire enlarged feature matrix on-chip or off-chip, a splitting strategy is adopted to reconstruct a convolutional layer to adapt to the on-chip memory capacity, and a 2D multiply-and-accumulate (MAC) array is adopted to compute matrix multiplications efficiently. For demonstration, we implement an accelerator prototype with a high-level synthesis (HLS) methodology on a Xilinx VC709 board and test the accelerator on three typical CNN models: AlexNet, VGG16, and C3D. Experimental results show that the accelerator achieves state-of-the-art throughput performance on both 2D and 3D CNNs, with much better energy efficiency than the CPU and GPU.


RSC Advances ◽  
2017 ◽  
Vol 7 (16) ◽  
pp. 9567-9572 ◽  
Author(s):  
Chunxia Wang ◽  
Fan Yang ◽  
Yan Cao ◽  
Xing He ◽  
Yushu Tang ◽  
...  

CuO nanowires can be synthesized by facile thermal oxidation of 3D Cu foam in air, which were found to be effective heterogeneous catalysts for the 1,3-dipolar cycloaddition reactions without using any additional support and bases.


2015 ◽  
Vol 7 (36) ◽  
pp. 20215-20223 ◽  
Author(s):  
Chaoqun Dong ◽  
Hua Zhong ◽  
Tianyi Kou ◽  
Jan Frenzel ◽  
Gunther Eggeler ◽  
...  

ChemSusChem ◽  
2017 ◽  
Vol 10 (7) ◽  
pp. 1475-1481 ◽  
Author(s):  
Hu Chen ◽  
Yan Gao ◽  
Licheng Sun

2018 ◽  
Vol 43 (10) ◽  
pp. 4978-4986 ◽  
Author(s):  
Shixiong Min ◽  
Junyu Qin ◽  
Wanxiu Hai ◽  
Yonggang Lei ◽  
Jianhua Hou ◽  
...  

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