Growth of Stacking-Faults-Free Zinc Blende GaAs Nanowires on Si Substrate by Using AlGaAs/GaAs Buffer Layers

Nano Letters ◽  
2010 ◽  
Vol 10 (1) ◽  
pp. 64-68 ◽  
Author(s):  
Hui Huang ◽  
Xiaomin Ren ◽  
Xian Ye ◽  
Jingwei Guo ◽  
Qi Wang ◽  
...  
Nano Letters ◽  
2009 ◽  
Vol 9 (1) ◽  
pp. 215-219 ◽  
Author(s):  
Hadas Shtrikman ◽  
Ronit Popovitz-Biro ◽  
Andrey Kretinin ◽  
Moty Heiblum

2012 ◽  
Vol 359 ◽  
pp. 30-34 ◽  
Author(s):  
Jingwei Guo ◽  
Hui Huang ◽  
Yizheng Ding ◽  
Zhuoyu Ji ◽  
Ming Liu ◽  
...  

Nanoscale ◽  
2018 ◽  
Vol 10 (5) ◽  
pp. 2588-2595 ◽  
Author(s):  
Edmund Pickering ◽  
Arixin Bo ◽  
Haifei Zhan ◽  
Xiaozhou Liao ◽  
Hark Hoe Tan ◽  
...  

Mechanical resonance of GaAs nanowires allows for measurement of the effect of stacking faults on Young's modulus and quality factor.


Nanoscale ◽  
2018 ◽  
Vol 10 (36) ◽  
pp. 17080-17091 ◽  
Author(s):  
Mahdi Zamani ◽  
Gözde Tütüncüoglu ◽  
Sara Martí-Sánchez ◽  
Luca Francaviglia ◽  
Lucas Güniat ◽  
...  

Compound semiconductors exhibit an intrinsic polarity, as a consequence of the ionicity of their bonds.


2011 ◽  
Vol 9 (4) ◽  
pp. 041601-41604 ◽  
Author(s):  
郭经纬 Jingwei Guo ◽  
黄辉 Hui Huang ◽  
任晓敏 Xiaomin Ren ◽  
颜鑫 Xin Yan ◽  
蔡世伟 Shiwei Cai ◽  
...  

Nano Letters ◽  
2008 ◽  
Vol 8 (12) ◽  
pp. 4459-4463 ◽  
Author(s):  
Dasa L. Dheeraj ◽  
Gilles Patriarche ◽  
Hailong Zhou ◽  
Thang B. Hoang ◽  
Anthonysamy F. Moses ◽  
...  
Keyword(s):  

Nano Letters ◽  
2015 ◽  
Vol 15 (2) ◽  
pp. 876-882 ◽  
Author(s):  
Zhi Zhang ◽  
Kun Zheng ◽  
Zhen-Yu Lu ◽  
Ping-Ping Chen ◽  
Wei Lu ◽  
...  
Keyword(s):  

2015 ◽  
Vol 1131 ◽  
pp. 16-19
Author(s):  
Patchareewan Prongjit ◽  
Samatcha Vorathamrong ◽  
Somsak Panyakeow ◽  
Chiraporn Tongyam ◽  
Piyasan Prasertthdam ◽  
...  

The GaAs nanowires are grown on Si (111) substrates by Ga-assisted molecular beam epitaxy growth technique. The effect of SiO2 thickness on the structural properties of GaAs nanowires is investigated by Scanning Electron Microscope (SEM). The nucleation of GaAs nanowires related to the presence of a SiO2 layer previously coated on Si substrate. The results show that the density, length, and diameter of GaAs nanowires strongly depend on the oxidation time (or SiO2 thickness).


2008 ◽  
Vol 1068 ◽  
Author(s):  
Tsuneo Ito ◽  
Yutaka Terada ◽  
Takashi Egawa

ABSTRACTDeep level electron traps in n-GaN grown by metal organic vapor phase epitaxy (MOVPE) on Si (111) substrate were studied by means of deep level transient spectroscopy (DLTS). The growth of n-GaN on different pair number of AlN/GaN superlattice buffer layers (SLS) system and on c-face sapphire substrate are compared. Three deep electron traps labeled E4 (0.7-0.8 eV), E5 (1.0-1.1 eV), were observed in n-GaN on Si substrate. And the concentrations of these traps observed for n-GaN on Si are very different from that on sapphire substrate. E4 is the dominant of these levels for n-GaN on Si substrate, and it behaves like point-defect due to based on the analysis by electron capture kinetics, in spite of having high dislocation density of the order of 1010 cm−3.


2000 ◽  
Vol 640 ◽  
Author(s):  
Nabil Sghaier ◽  
Abdel K. Souifi ◽  
Jean-Marie Bluet ◽  
Manuel Berenguer ◽  
Gérard Guillot ◽  
...  

ABSTRACTThe aim of this work is to study the origin of parasitic phenomena in the output characteristics of 4H-SiC MESFETs on semi-insulating (SI) substrates with various buffer layers. Ids-Vds measurements as a function of temperature have first been performed. Different parasitic effects such as kink effect, hysteresis effect when the gate voltage is successively increased or decreased, or changes in the output characteristics after a high drain polarization are presented. Random Telegraph Signal (RTS) measurements and frequency dispersion of the output conductance have next been realized. From the obtained results, we propose that the parasitic effect on the output characteristics are correlated with the presence of deep levels located near the semi -insulating substrate interface. The main observed trap is tentatively attributed to the presence of Vanadium in the SI substrate.


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