Controlled Fabrication of Silicon Nanowires by Electron Beam Lithography and Electrochemical Size Reduction

Nano Letters ◽  
2005 ◽  
Vol 5 (2) ◽  
pp. 275-280 ◽  
Author(s):  
Robert Juhasz ◽  
Niklas Elfström ◽  
Jan Linnros
Keyword(s):  
Electron Beam ◽  
Silicon Nanowires ◽  
Electron Beam Lithography ◽  
Size Reduction

Fabrication of Silicon Nanowires by Electron Beam Lithography and Thermal Oxidation Size Reduction Method

2013 ◽  
Vol 832 ◽  
pp. 415-418 ◽  
Author(s):  
Mohammad Nuzaihan Md Nor ◽  
Uda Hashim ◽  
Taib Nazwa ◽  
Tijjani Adam
Keyword(s):  
Electron Beam ◽  
Thermal Oxidation ◽  
Silicon Nanowires ◽  
Electron Beam Lithography ◽  
Reduction Method ◽  
Size Reduction ◽  
Simple Method ◽  
Force Microscopy ◽  
Initial Silicon ◽  
20 Nm

A simple method for the fabrication of silicon nanowires using Electron Beam Lithography (EBL) combined with thermal oxidation size reduction method is presented. EBL is used to define the initial silicon nanowires of dimensions approximately 100 nm. Size-reduction method is employed for reaching true nanoscale of dimensions approximately 20 nm. Dry oxidation of silicon is well investigated process for self-limited size-reduction of silicon nanowires. In this paper, successful size reduction of silicon nanowires is presented and surface topography characterizations using Atomic Force Microscopy (AFM) are reported.

Current Rectification in a Single Silicon Nanowire p–n Junction

2008 ◽  
Vol 8 (5) ◽  
pp. 2419-2421 ◽  
Author(s):  
Yaswanth Rangineni ◽  
Cheng Qi ◽  
Gary Goncher ◽  
Raj Solanki ◽  
Kurt Langworthy
Keyword(s):  
Electron Beam ◽  
Silicon Nanowires ◽  
Electron Beam Lithography ◽  
Reverse Bias ◽  
Silicon Nanowire ◽  
Exponential Behavior ◽  
Current Leakage ◽  
Leakage Mechanism ◽  
Current Voltage ◽  
Current Rectification

Diodes within individual silicon nanowires were fabricated by doping them during growth to produce p–n junctions. Electron beam lithography was then employed to contact p- and n-doped ends of these nanowires. The current–voltage (I–V) measurements showed diode-like characteristics with a typical threshold voltage (Vt) of about 1 V and an ideality factor (n) of about 3.6 in the quasi-neutral region. The reverse bias I–V measurement showed an exponential behavior, indicating tunneling as the current leakage mechanism.

Lithography below 100 nm

1983 ◽  
Vol 41 ◽  
pp. 96-99
Author(s):  
L. D. Jackel
Keyword(s):  
Spatial Distribution ◽  
Electron Beam ◽  
Electron Scattering ◽  
Electron Beam Lithography ◽  
Substrate Material ◽  
Local Electron ◽  
Electron Dose ◽  
Positive Resist ◽  
Exposure Process

Most production electron beam lithography systems can pattern minimum features a few tenths of a micron across. Linewidth in these systems is usually limited by the quality of the exposing beam and by electron scattering in the resist and substrate. By using a smaller spot along with exposure techniques that minimize scattering and its effects, laboratory e-beam lithography systems can now make features hundredths of a micron wide on standard substrate material. This talk will outline sane of these high- resolution e-beam lithography techniques.We first consider parameters of the exposure process that limit resolution in organic resists. For concreteness suppose that we have a “positive” resist in which exposing electrons break bonds in the resist molecules thus increasing the exposed resist's solubility in a developer. Ihe attainable resolution is obviously limited by the overall width of the exposing beam, but the spatial distribution of the beam intensity, the beam “profile” , also contributes to the resolution. Depending on the local electron dose, more or less resist bonds are broken resulting in slower or faster dissolution in the developer.

Fabrication of Si photonic waveguides by electron beam lithography using improved proximity effect correction

2020 ◽  
Vol 59 (12) ◽  
pp. 126502
Author(s):  
Moataz Eissa ◽  
Takuya Mitarai ◽  
Tomohiro Amemiya ◽  
Yasuyuki Miyamoto ◽  
Nobuhiko Nishiyama
Keyword(s):  
Electron Beam ◽  
Proximity Effect ◽  
Electron Beam Lithography ◽  
Photonic Waveguides ◽  
Proximity Effect Correction

Salicidation process for submicrometre gate MOSFET fabrication using a resistless electron beam lithography process

1999 ◽  
Vol 35 (15) ◽  
pp. 1283 ◽  
Author(s):  
S. Michel ◽  
E. Lavallée ◽  
J. Beauvais ◽  
J. Mouine
Keyword(s):  
Electron Beam ◽  
Electron Beam Lithography ◽  
Lithography Process

scholarly journals Nanooptical elements for visual verification

2021 ◽  
Vol 11 (1) ◽  
Author(s):  
Alexander Goncharsky ◽  
Anton Goncharsky ◽  
Dmitry Melnik ◽  
Svyatoslav Durlevich
Keyword(s):  
Electron Beam ◽  
Electron Beam Lithography ◽  
Mass Production ◽  
Optical Element ◽  
Visual Image ◽  
Zero Order ◽  
Diffractive Optical Elements ◽  
Optical Elements ◽  
Standard Equipment ◽  
Diffractive Element

AbstractThis paper focuses on the development of flat diffractive optical elements (DOEs) for protecting banknotes, documents, plastic cards, and securities against counterfeiting. A DOE is a flat diffractive element whose microrelief, when illuminated by white light, forms a visual image consisting of several symbols (digits or letters), which move across the optical element when tilted. The images formed by these elements are asymmetric with respect to the zero order. To form these images, the microrelief of a DOE must itself be asymmetric. The microrelief has a depth of ~ 0.3 microns and is shaped with an accuracy of ~ 10–15 nm using electron-beam lithography. The DOEs developed in this work are securely protected against counterfeiting and can be replicated hundreds of millions of times using standard equipment meant for the mass production of relief holograms.

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