Experimental Investigation of Charge Carrier Transport in Organic Thin-Film Transistors with “Buried Surface Layers”

2011 ◽  
Vol 3 (2) ◽  
pp. 139-142 ◽  
Author(s):  
Qingshuo Wei ◽  
Kazuhito Hashimoto ◽  
Keisuke Tajima
2018 ◽  
Vol 8 (8) ◽  
pp. 1341 ◽  
Author(s):  
Rei Shiwaku ◽  
Masataka Tamura ◽  
Hiroyuki Matsui ◽  
Yasunori Takeda ◽  
Tomohide Murase ◽  
...  

Dual-gate organic thin-film transistors (DGOTFTs), which exhibit better electrical properties, in terms of on-current and subthreshold slope than those of single-gate organic thin-film transistors (OTFTs) are promising devices for high-performance and robust organic electronics. Electrical behaviors of high-voltage (>10 V) DGOTFTs have been studied: however, the performance analysis in low-voltage DGOTFTs has not been reported because fabrication of low-voltage DGOTFTs is generally challenging. In this study, we successfully fabricated low-voltage (<5 V) DGOTFTs by employing thin parylene film as gate dielectrics and visualized the charge carrier distributions in low-voltage DGOTFTs by a simulation that is based on finite element method (FEM). The simulation results indicated that the dual-gate system produces a dual-channel and has excellent control of charge carrier density in the organic semiconducting layer, which leads to the better switching characteristics than the single-gate devices.


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