High mobility bottom gate nanocrystalline-Si thin-film transistors

2011 ◽  
Vol 519 (11) ◽  
pp. 3922-3924 ◽  
Author(s):  
Masaki Hara
2013 ◽  
Vol 103 (20) ◽  
pp. 203501 ◽  
Author(s):  
Uio-Pu Chiou ◽  
Jia-Min Shieh ◽  
Chih-Chao Yang ◽  
Wen-Hsien Huang ◽  
Yo-Tsung Kao ◽  
...  

1994 ◽  
Vol 33 (Part 2, No. 3B) ◽  
pp. L409-L412 ◽  
Author(s):  
Tadashi Serikawa ◽  
Seiiti Shirai ◽  
Sadao Takaoka ◽  
Kazuo Murase ◽  
Shuichi Ishida

2006 ◽  
Vol 910 ◽  
Author(s):  
Durga Panda ◽  
Max Noack ◽  
Vikram Dalal

AbstractWe report on the growth and properties of p-channel nanocrystalline Si thin film transistor (TFT) devices. In contrast to previous work, the devices are fabricated in n-body nanocrystalline Si. The doping of the n-body is systematically changed by doping with ppm levels of phosphorous. The threshold voltage was found to change systematically as phosphorus content increased. The TFT devices are of the bottom-gate type, grown on oxidized Si wafers. Source and drain contacts were provided by using either plasma grown p type nanocrystalline layers, or by the simple process of Al diffusion. A top layer of plasma-deposited silicon dioxide was found to decrease the off current significantly. High on-off current ratios exceeding 106 were obtained. Hole mobilities in the devices were consistently good, with the best mobility being in the range of ~1.3 cm2/V-s.


2011 ◽  
Vol 11 (7) ◽  
pp. 5612-5617 ◽  
Author(s):  
I-Che Lee ◽  
Po-Yu Yang ◽  
Ming-Jhe Hu ◽  
Jyh-Liang Wang ◽  
Chun-Chien Tsai ◽  
...  

1991 ◽  
Vol 30 (Part 1, No. 12B) ◽  
pp. 3704-3709 ◽  
Author(s):  
Kazuhiro Shimizu ◽  
Hideki Hosoya ◽  
Osamu Sugiura ◽  
Masakiyo Matsumura

2003 ◽  
Vol 762 ◽  
Author(s):  
Kousaku Shimizu ◽  
JianJun Zhang ◽  
Jeong-Woo Lee ◽  
Jun-ichi Hanna

AbstractIn the fabrication of thin film transistors (TFTs), little attention has been paid to the polycrystalline silicon thin films prepared at low temperatures where the glass substrates are adopted so far. Since the film quality is not sufficient to achieve high mobility, e.g., over 50 cm2/Vs in spite of high benefit in their industrial fabrication. We have fabricated bottom gate TFTs with poly-Si and poly- Si1-xGex thin films deposited at 450°C by newly developed low-temperature LPCVD technique and characterized electrical characteristics of the TFTs: disilane and a small amount of either germanium tetrafluoride or fluorine were used as material gases and helium as carrier gas. Thermal annealing for dopant activation and atomic hydrogen treatment for defect passivation were carried out. We found that the defect elimination process is important for improving TFT performance significantly. Finally the mobility of p-channel and n-channel TFTs have attained 36.3-54.4 cm2/Vs and 57 cm2/Vs, respectively.


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