Thermal-stress stability of yttrium oxide as a buffer layer of metal-ferroelectric-insulator-semiconductor field effect transistor

2005 ◽  
Vol 473 (2) ◽  
pp. 335-339 ◽  
Author(s):  
Chang Ki Lee ◽  
Woo Sik Kim ◽  
Hyung-Ho Park ◽  
Hyeongtag Jeon ◽  
Yeon Ho Pae
Keyword(s):  
Thermal Stress ◽  
Buffer Layer ◽  
Yttrium Oxide ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Effect Transistor

Strontium Bismuth Tantalate Based Ferroelectric Gate Field Effect Transistor with Yttrium Oxide as the Buffer Layer

1997 ◽  
Vol 493 ◽  
Author(s):  
Myoung-Ho Lim ◽  
T. S. Kalkur ◽  
Yong-Tae Kim
Keyword(s):  
Buffer Layer ◽  
Yttrium Oxide ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Rate Of Change ◽  
Memory Window ◽  
Tem Analysis ◽  
Transmission Electron ◽  
Capacitance Voltage ◽  
Effect Transistor

ABSTRACTWe report the first demonstration of an enhancement mode n-channel metal -ferroelectric-semiconductor field effect transistor (MFISFET) realized directly on silicon with yttrium oxide as the buffer layer. The capacitance-voltage (C-V) characteristics of Metal Ferroelectric Insulator Silicon (MFIS) structures show hysteresis and the direction of hysteresis corresponds to ferroelectric polarization. The memory window in the C-V characteristics was 2V for an applied voltage of ± 10V. The memory window did not show significant change due to decrease in rate of change of sweep voltage and temperature. The transmission electron microscopy (TEM) analysis confirms the formation of an amorphous oxide layer between silicon and yttrium oxide buffer layer.

Control of Threshold Voltage for Top-Gated Ambipolar Field-Effect Transistor by Gate Buffer Layer

2016 ◽  
Vol 8 (27) ◽  
pp. 17416-17420 ◽  
Author(s):  
Dongyoon Khim ◽  
Eul-Yong Shin ◽  
Yong Xu ◽  
Won-Tae Park ◽  
Sung-Ho Jin ◽  
...  
Keyword(s):  
Buffer Layer ◽  
Threshold Voltage ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Effect Transistor

scholarly journals Improved MRD 4H-SiC MESFET with High Power Added Efficiency

Micromachines ◽  
2019 ◽  
Vol 10 (7) ◽  
pp. 479 ◽  
Author(s):  
Shunwei Zhu ◽  
Hujun Jia ◽  
Xingyu Wang ◽  
Yuan Liang ◽  
Yibo Tong ◽  
...  
Keyword(s):  
Radio Frequency ◽  
Buffer Layer ◽  
High Power ◽  
Computer Aided Design ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Design System ◽  
Power Added Efficiency ◽  
Effect Transistor ◽  
Rf Performance

An improved multi-recessed double-recessed p-buffer layer 4H–SiC metal semiconductor field effect transistor (IMRD 4H-SiC MESFET) with high power added efficiency is proposed and studied by co-simulation of advanced design system (ADS) and technology computer aided design (TCAD) Sentaurus software in this paper. Based on multi-recessed double-recessed p-buffer layer 4H–SiC metal semiconductor field effect transistor (MRD 4H-SiC MESFET), the recessed area of MRD MESFET on both sides of the gate is optimized, the direct current (DC), radio frequency (RF) parameters and efficiency of the device is balanced, and the IMRD MESFET with a best power-added efficiency (PAE) is finally obtained. The results show that the PAE of the IMRD MESFET is 68.33%, which is 28.66% higher than the MRD MESFET, and DC and RF performance have not dropped significantly. Compared with the MRD MESFET, the IMRD MESFET has a broader prospect in the field of microwave radio frequency.

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