GaAs solar cell on Si substrate with good ohmic GaAs/Si interface by direct wafer bonding

2015 ◽  
Vol 141 ◽  
pp. 372-376 ◽  
Author(s):  
SangHyeon Kim ◽  
Dae-Myeong Geum ◽  
Min-Su Park ◽  
Chang Zoo Kim ◽  
Won Jun Choi
Keyword(s):  
Solar Cell ◽  
Wafer Bonding ◽  
Si Substrate ◽  
Direct Wafer Bonding

Seebeck Coefficient of Ge-on-Insulator Layers Fabricated by Direct Wafer Bonding Process

2015 ◽  
Vol 1117 ◽  
pp. 94-97 ◽  
Author(s):  
Veerappan Manimuthu ◽  
Shoma Yoshida ◽  
Yuhei Suzuki ◽  
Faiz Salleh ◽  
Mukannan Arivanandhan ◽  
...  
Keyword(s):  
Seebeck Coefficient ◽  
Wafer Bonding ◽  
Annealing Effect ◽  
Bonding Process ◽  
Infrared Photodetector ◽  
Si Substrate ◽  
Temperature Range ◽  
Direct Wafer Bonding ◽  
Insulator Layers ◽  
P Type

We investigate thermoelectric characteristics of SiGe nanostructures for realizing high-sensitive infrared photodetector applications. In this paper, for future Ge and SiGe nanowires, we fabricate p-type Ge-on-insulator (GOI) substrates by a direct wafer bonding process. We discuss the annealing effect on the GOI substrate in the process and measure its Seebeck coefficient in the temperature range of 290-350 K. The Seebeck coefficient of the GOI layers is almost identical with the reported values for Ge. This result confirms that the measured Seebeck coefficient of GOI layers is not influenced by the buried oxide (BOX) layer and the Si substrate.

Fabrication of Strained Silicon on Insulator (SSOI) by Direct Wafer Bonding Using Thin Relaxed SiGe Film as Virtual Substrate

2004 ◽  
Vol 809 ◽  
Author(s):  
J.J. Lee ◽  
J.S. Maa ◽  
D. J. Tweet ◽  
S.T. Hsu
Keyword(s):  
Wafer Bonding ◽  
Lattice Relaxation ◽  
Channel Length ◽  
Silicon On Insulator ◽  
Si Substrate ◽  
Strained Si ◽  
Drive Current ◽  
Defect Zone ◽  
Direct Wafer Bonding ◽  
Strained Sige

ABSTRACTNMOS devices have been successfully fabricated on SSOI wafers. The SSOI wafer fabrication is by direct wafer bonding and wafer transfer by splitting of the strained Si on thin SiGe virtual substrate to an oxidized wafer. The thin SiGe virtual substrate is fabricated by strained SiGe deposition, H2+ implantation, and SiGe lattice relaxation anneal. This relaxation process creates a confined defect zone at the SiGe to Si substrate interface that ensures low defect strained Si growth. 10 μm by 10 μm NMOS SSOI devices show an improvement of 100% in drive current and 115% in transconductance. A near ideal subthreshold swing was observed on NMOS devices with channel length as short as 0.1 μm.

Use of direct wafer bonding of silicon for fabricating solar cell structures with vertical p-n junctions

1998 ◽  
Vol 32 (7) ◽  
pp. 789-791 ◽  
Author(s):  
V. B. Voronkov ◽  
E. G. Guk ◽  
V. A. Kozlov ◽  
M. Z. Shvarts ◽  
V. B. Shuman
Keyword(s):  
Solar Cell ◽  
Wafer Bonding ◽  
Cell Structures ◽  
Direct Wafer Bonding

High Precision Low Temperature Direct Wafer Bonding Technology for Wafer-Level 3D ICs Manufacturing

2016 ◽  
Vol 75 (9) ◽  
pp. 345-353 ◽  
Author(s):  
F. Kurz ◽  
T. Plach ◽  
J. Suss ◽  
T. Wagenleitner ◽  
D. Zinner ◽  
...  
Keyword(s):  
Low Temperature ◽  
High Precision ◽  
Wafer Bonding ◽  
Wafer Level ◽  
3D Ics ◽  
Direct Wafer Bonding ◽  
Bonding Technology

Low temperature GaAs/Si direct wafer bonding

2000 ◽  
Vol 36 (7) ◽  
pp. 677 ◽  
Author(s):  
M. Alexe ◽  
V. Dragoi ◽  
M. Reiche ◽  
U. Gösele
Keyword(s):  
Low Temperature ◽  
Wafer Bonding ◽  
Direct Wafer Bonding ◽  
Low Temperature Gaas

Point defects generated by direct-wafer bonding of silicon

2002 ◽  
Vol 31 (2) ◽  
pp. 113-118 ◽  
Author(s):  
L. Dózsa ◽  
B. Szentpáli ◽  
D. Pasquariello ◽  
K. Hjort
Keyword(s):  
Point Defects ◽  
Wafer Bonding ◽  
Direct Wafer Bonding

New Generation of Structures Obtained by Direct Wafer Bonding of Processed Wafers

2019 ◽  
Vol 3 (6) ◽  
pp. 79-90 ◽  
Author(s):  
Bernard Aspar ◽  
Chrystelle Lagahe-Blanchard ◽  
Nicolas Sousbie ◽  
Jacques Margail ◽  
H. Moriceau
Keyword(s):  
Wafer Bonding ◽  
Direct Wafer Bonding ◽  
New Generation
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