Porous silicon layer transfer processes for solar cells

2004 ◽  
Vol 83 (1) ◽  
pp. 101-113 ◽  
Author(s):  
C.S Solanki ◽  
R.R Bilyalov ◽  
J Poortmans ◽  
J Nijs ◽  
R Mertens
Keyword(s):  
Solar Cells ◽  
Porous Silicon ◽  
Silicon Layer ◽  
Porous Silicon Layer ◽  
Layer Transfer ◽  
Transfer Processes

Heterojunction solar cells produced by porous silicon layer transfer technology

2012 ◽  
Vol 108 (4) ◽  
pp. 929-934 ◽  
Author(s):  
Zhihao Yue ◽  
Honglie Shen ◽  
Lei Zhang ◽  
Bin Liu ◽  
Chao Gao ◽  
...  
Keyword(s):  
Solar Cells ◽  
Porous Silicon ◽  
Silicon Layer ◽  
Porous Silicon Layer ◽  
Layer Transfer ◽  
Heterojunction Solar Cells

Effects of Electrochemical Etching Time on the Performance of Porous Silicon Solar Cells on Crystalline n-Type (100) and (111)

2017 ◽  
Vol 46 ◽  
pp. 45-56 ◽  
Author(s):  
Khalid Omar ◽  
Khaldun A. Salman
Keyword(s):  
Solar Cells ◽  
Porous Silicon ◽  
Crystalline Silicon ◽  
Electrochemical Etching ◽  
Silicon Layer ◽  
Porous Silicon Layer ◽  
Silicon Solar Cells ◽  
Etching Time ◽  
Crystalline Silicon Solar Cells ◽  
Coating Layers

Electrochemical etching was carried out to produce porous silicon based on crystalline silicon n-type (100) and (111) wafers. Etching times of 10, 20, and 30 min were applied. Porous silicon layer was used as anti-reflection coating on crystalline silicon solar cells. The optimal etching time is 20 min for preparing porous silicon layers based on crystalline silicon n-type (100) and (111) wafers. Nanopores with high porosity were produced on the porous silicon layer based on crystalline silicon n-type (100) and (111) wafers with average diameters of 5.7 and 5.8 nm, respectively. Average crystallite sizes for the porous silicon layer based on crystalline silicon n-type (100) and (111) wafers were 20.57 and 17.45 nm at 20 and 30 min, respectively, due to the increase in broadening of the full width at half maximum. Photoluminescence peaks for porous silicon layers based on crystalline silicon n-type (100) and (111) wafers increased with growing porosity and a great blue shift in luminescence. The minimum effective coefficient of reflection was obtained from porous silicon layers based on the crystalline silicon n-type (100) wafer compared with n-type (111) wafer and as-grown at different etching times. Porous silicon layers based on the crystalline silicon n-type (100) wafer at 20 min etching time exhibited excellent light trapping at wavelengths ranging from 400 to 1000 nm. Thus, fabricated crystalline silicon solar cells based on porous silicon (100) anti-reflection coating layers achieved the highest efficiency at 15.50% compared to porous silicon (111) anti-reflection coating layers. The efficiency is characterized applying I-V characterization system under 100 mW/cm2 illumination conditions.

scholarly journals CONTROL OVER THE PERFORMANCE OF MONOCRYSTALLINE SILICON SOLAR CELLS REFERRING TO THE POROUS SILICON LAYER / MONOKRISTALINIO SILICIO SAULĖS ELEMENTŲ CHARAKTERISTIKŲ VALDYMAS AKYTOJO SILICIO SLUOKSNIU

2012 ◽  
Vol 3 (6) ◽  
pp. 91-94
Author(s):  
Ramūnas Mitkevičius ◽  
Viktor Zagadskij ◽  
Eugenijus Šatkovskis
Keyword(s):  
Solar Cells ◽  
Porous Silicon ◽  
Output Power ◽  
Crystalline Silicon ◽  
Silicon Layer ◽  
Porous Silicon Layer ◽  
Silicon Solar Cells ◽  
Crystalline Silicon Solar Cells ◽  
Maximal Output Power ◽  
Maximal Output

The paper examines the parameters of crystalline silicon solar cells such as fill factor, maximal output power and series resistance forming a porous silicon layer. The obtained results show that introducing the layer into the structure of a solar cell results in a 19 percent enhancement of maximal output power and conversion efficiency. Santrauka Šiame darbe tiriamas akytojo silicio darinių poveikis saulės elementų elektrinėms charakteristikoms: nuosekliajai varžai, voltamperinių charakteristikų formai. Parodyta, kad pagaminus silicio saulės elemente akytojo silicio sluoksnį, galima veikti (valdyti) saulės elementų voltamperines charakteristikas ir elemento nuosekliąją elektrinę varžą. Nustatyta, kad tiriamajame bandinyje suformavus akytojo silicio sluoksnį, apkrovos voltamperinės charakteristikos užpildos rodiklis padidėjo 1,15 karto, o maksimali elemento kuriama ir apkrovos metu atiduodama elektros energijos galia – 1,19 karto. Tiek pat 1,19 karto padidėjo saulės elemento šviesos konversijos į elektros energiją efektyvumas.

Reuse of Substrate Wafers for the Porous Silicon Layer Transfer

2016 ◽  
Vol 6 (3) ◽  
pp. 783-790 ◽  
Author(s):  
Verena Steckenreiter ◽  
Jan Hensen ◽  
Alwina Knorr ◽  
Sarah Kajari-Schroder ◽  
Rolf Brendel
Keyword(s):  
Porous Silicon ◽  
Silicon Layer ◽  
Porous Silicon Layer ◽  
Layer Transfer

Improvement of seed layer smoothness for epitaxial growth on porous silicon

2013 ◽  
Vol 1536 ◽  
pp. 97-102 ◽  
Author(s):  
R. Martini ◽  
Radhakrishnan H. Sivaramakrishnan ◽  
V. Depauw ◽  
K. Van Nieuwenhuysen ◽  
I. Gordon ◽  
...  
Keyword(s):  
Solar Cells ◽  
Porous Silicon ◽  
Epitaxial Growth ◽  
Seed Layer ◽  
Reliable Method ◽  
Electrochemical Etching ◽  
Silicon Layer ◽  
Porous Silicon Layer ◽  
Silicon Solar Cells

ABSTRACTIn the last decades many techniques have been proposed to manufacture thin (<50µm) silicon solar cells. The main issues in manufacturing thin solar cells are the unavailability of a reliable method to produce thin silicon foils with contained material losses (kerf-losses) and the difficulties in handling and processing such fragile foils. A way to solve both issues is to grow an epitaxial foil on top of a weak sintered porous silicon layer. The porous silicon layer is formed by electrochemical etching on a thick silicon substrate and then annealed to close the top surface. This surface is employed as seed layer for the epitaxial growth of a silicon layer which can be partially processed while attached on the substrate that provides mechanical support. Afterward, the foil can be bonded on glass, detached and further processed at module level. The efficiency of the final solar cell will depend on the quality of the epitaxial layer which, in turn, depends on the seed layer smoothness.Several parameters can be adjusted to change the morphology and, hence, the properties of the porous layer, both in the porous silicon formation and the succeeding thermal treatment. This work focuses on the effect of the parameters that control the porous silicon formation on the structure of the porous silicon layer after annealing and, more specifically, on the roughness of the top surface. The reported analysis shows how the roughness of the seed layer can be reduced to improve the quality of the epitaxial growth.

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