scholarly journals High Efficiency Piezoelectric Energy Harvester with Synchronized Switching Interface Circuit

2012 ◽  
Vol 47 ◽  
pp. 394-397 ◽  
Author(s):  
P. Becker ◽  
E. Hymon ◽  
B. Folkmer ◽  
Y. Manoli
2012 ◽  
Vol 24 (2) ◽  
pp. 180-193 ◽  
Author(s):  
Yu-Yin Chen ◽  
Dejan Vasic ◽  
Yuan-Ping Liu ◽  
François Costa

In this article, a piezoelectric energy harvesting device comprises a bistable vibrating cantilever beam and a switching-type interface circuit (synchronized switching harvesting on an inductor) is proposed, and the resulting performance is compared to the traditional linear technique. It was known that the synchronized switching techniques increase efficiently the output power of the piezoelectric energy harvester for low-coupled structures. However, the traditional piezoelectric energy harvester based on a cantilever beam is only efficient at resonance. To broaden the available bandwidth, a bistable nonlinear technique was proposed. In this article, the bistable technique and synchronized switching harvesting on an inductor interface are combined together to accomplish a more efficient broadband piezoelectric energy harvester. The power flow and work cycles are adopted to simplify the analysis of the switching techniques and then summarize the increasing performance of the nonlinear piezoelectric harvester. Finally, simulation results and experimental validations show that the proposed integrated device owns larger bandwidth and collects more harvested energy.


Energies ◽  
2020 ◽  
Vol 13 (15) ◽  
pp. 3830
Author(s):  
Jiqiang Liu ◽  
Junjie Yang ◽  
Ruofeng Han ◽  
Qisheng He ◽  
Dacheng Xu ◽  
...  

The vibration-threshold-triggered piezoelectric energy harvester is a new type of piezoelectric energy harvester with a two-stage structure, which can generate electricity in a low frequency environment and recognize vibration intensity at the same time. In this study, a theoretical model of a vibration-threshold-triggered energy harvester was examined, and an equivalent circuit model of the energy harvester was obtained. Then, an interface circuit was proposed that can significantly improve the output power of the energy harvester. The interface circuit achieved impedance matching with the piezoelectric material to maximize the energy collected from the energy harvester. First, we calculated and analyzed the impedance characteristics of the energy harvester, based on the equivalent circuit model. It was found that because the piezoelectric material is in resonance as the energy harvester is in operation, the corresponding impedance is almost resistance. Therefore, a resistance-matching strategy was proposed. Last, we proposed an interface circuit with adjustable input impedance to achieve resistance matching. The experimental results show that the proposed interface circuit can increase the output power of the energy harvester by 48.1–55.7% over that achieved with the standard interface circuit.


Author(s):  
Talam Satyanarayana ◽  
Y. Nikhitha ◽  
Ch. Neeraj Kumar ◽  
K. Jeevan Naga Sai ◽  
V. Lohitha

2019 ◽  
Vol 29 (08) ◽  
pp. 2020004
Author(s):  
Lianxi Liu ◽  
Yu Shang ◽  
Jiangwei Cheng ◽  
Zhangming Zhu

A miniature and high-efficiency interface circuit based on parallel synchronous switch harvesting on capacitors (P-SSHC) for piezoelectric energy harvesting (PEH) is proposed in this paper. This interface circuit consists of a two-stage synchronous rectifier and the P-SSHC circuit. The two-stage synchronous rectifier, composed of a negative voltage converter (NVC) and an active diode (AD), achieves higher efficiency compared with the full-bridge rectifier (FBR). In addition, the two-stage synchronous rectifier detects the zero-crossing moment of the input current; therefore, an extra current zero-crossing detection circuit is eliminated, which simplifies the structure of the interface circuit, reduces power consumption and improves peak converting efficiency. The P-SSHC circuit aims to improve the power extraction capability of the rectifier. The P-SSHC achieves considerable voltage flipping efficiency with very small volume compared to the parallel synchronized switch harvesting on inductor (P-SSHI), which is more suitable for volume sensitive applications. The proposed interface circuit is designed in SMIC 0.35[Formula: see text][Formula: see text]m CMOS process. Simulation results show that it achieves a [Formula: see text] output power improvement compared with FBR for the case of a 3.4[Formula: see text]V open-circuit voltage, the voltage flipping efficiency is as high as 83.6% and the peak power converting efficiency is up to 91.5%. The overall volume of the capacitors used in this paper is only 0.6[Formula: see text]mm3, which is much smaller than the inductor used by conventional P-SSHI interface circuit.


2015 ◽  
Vol 15 (3) ◽  
pp. 319-325 ◽  
Author(s):  
Xuan-Dien Do ◽  
Huy-Hieu Nguyen ◽  
Seok-Kyun Han ◽  
Dong Sam Ha ◽  
Sang-Gug Lee

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