scholarly journals Requirements for High Level Models Supporting Design Space Exploration in Model-based Systems Engineering

2013 ◽  
Vol 16 ◽  
pp. 293-302 ◽  
Author(s):  
Steven P. Haveman ◽  
G. Maarten Bonnema
Keyword(s):  
Systems Engineering ◽  
Design Space Exploration ◽  
Design Space ◽  
Space Exploration ◽  
Model Based ◽  
High Level ◽  
Model Based Systems Engineering

scholarly journals Core-Level Modeling and Frequency Prediction for DSP Applications on FPGAs

2015 ◽  
Vol 2015 ◽  
pp. 1-20
Author(s):  
Gongyu Wang ◽  
Greg Stitt ◽  
Herman Lam ◽  
Alan George
Keyword(s):  
High Performance ◽  
Design Space Exploration ◽  
Design Space ◽  
Space Exploration ◽  
Core Level ◽  
Prediction Methods ◽  
Clock Frequency ◽  
Worst Case ◽  
Model Based ◽  
Dsp Applications

Field-programmable gate arrays (FPGAs) provide a promising technology that can improve performance of many high-performance computing and embedded applications. However, unlike software design tools, the relatively immature state of FPGA tools significantly limits productivity and consequently prevents widespread adoption of the technology. For example, the lengthy design-translate-execute (DTE) process often must be iterated to meet the application requirements. Previous works have enabled model-based, design-space exploration to reduce DTE iterations but are limited by a lack of accurate model-based prediction of key design parameters, the most important of which is clock frequency. In this paper, we present a core-level modeling and design (CMD) methodology that enables modeling of FPGA applications at an abstract level and yet produces accurate predictions of parameters such as clock frequency, resource utilization (i.e., area), and latency. We evaluate CMD’s prediction methods using several high-performance DSP applications on various families of FPGAs and show an average clock-frequency prediction error of 3.6%, with a worst-case error of 20.4%, compared to the best of existing high-level prediction methods, 13.9% average error with 48.2% worst-case error. We also demonstrate how such prediction enables accurate design-space exploration without coding in a hardware-description language (HDL), significantly reducing the total design time.

Computational Design Synthesis: A Model-Based Approach for Complex Systems

2012 ◽  
Author(s):  
Nicolas Albarello ◽  
Jean-Baptiste Welcomme
Keyword(s):  
Design Space Exploration ◽  
Design Space ◽  
Space Exploration ◽  
Design Rules ◽  
System Architectures ◽  
Architecture Model ◽  
Model Based ◽  
Design Alternatives ◽  
Systems Architectures ◽  
The Impact

The design of systems architectures often involve a combinatorial design-space made of technological and architectural choices. A complete or large exploration of this design space requires the use of a method to generate and evaluate design alternatives. This paper proposes an innovative approach for the design-space exploration of systems architectures. The SAMOA (System Architecture Model-based OptimizAtion) tool associated to the method is also introduced. The method permits to create a large number of various system architectures combining a set of possible components to address given system functions. The method relies on models that are used to represent the problem and the solutions and to evaluate architecture performances. An algorithm first synthesizes design alternatives (a physical architecture associated to a functional allocation) based on the functional architecture of the system, the system interfaces, a library of available components and user-defined design rules. Chains of components are sequentially added to an initially empty architecture until all functions are fulfilled. The design rules permit to guarantee the viability and validity of the chains of components and, consequently, of the generated architectures. The design space exploration is then performed in a smart way through the use of an evolutionary algorithm, the evolution mechanisms of which are specific to system architecting. Evaluation modules permit to assess the performances of alternatives based on the structure of the architecture model and the data embedded in the component models. These performances are used to select the best generated architectures considering constraints and quality metrics. This selection is based on the Pareto-dominance-based NSGA-II algorithm or, alternatively, on an interactive preference-based algorithm. Iterating over this evolution-evaluation-selection process permits to increase the quality of solutions and, thus, to highlight the regions of interest of the design-space which can be used as a base for further manual investigations. By using this method, the system designers have a larger confidence in the optimality of the adopted architecture than using a classical derivative approach as many more solutions are evaluated. Also, the method permits to quickly evaluate the trade-offs between the different considered criteria. Finally, the method can also be used to evaluate the impact of a technology on the system performances not only by a substituting a technology by another but also by adapting the architecture of the system.

scholarly journals A rapid design space exploration approach for multi-objective optimization of DSP filter designs

2021 ◽  
Author(s):  
Aakriti Tarun Sharma
Keyword(s):  
Design Space Exploration ◽  
Design Space ◽  
Space Exploration ◽  
Systems Design ◽  
Design Solution ◽  
Multi Objective Optimization ◽  
Multi Objective ◽  
Time Period ◽  
And Performance ◽  
High Level

The process of converting a behavioral specification of an application to its equivalent system architecture is referred to as High Level-Synthesis (HLS). A crucial stage in embedded systems design involves finding the trade off between resource utilization and performance. An exhaustive search would yield the required results, but would take a huge amount of time to arrive at the solution even for smaller designs. This would result in a high time complexity. We employ the use of Design Space Exploration (DSE) in order to reduce the complexity of the design space and to reach the desired results in less time. In reality, there are multiple constraints defined by the user that need to be satisfied simultaneously. Thus, the nature of the task at hand is referred to as Multi-Objective Optimization. In this thesis, the design process of DSP benchmarks was analyzed based on user defined constraints such as power and execution time. The analyzed outcome was compared with the existing approaches in DSE and an optimal design solution was derived in a shorter time period.

scholarly journals Execution time - area tradeoff in gausing residual load decoder: Integrated exploration of chaining based schedule and allocation in HLS for hardware accelerators

2014 ◽  
Vol 27 (2) ◽  
pp. 235-249 ◽  
Author(s):  
Anirban Sengupta ◽  
Reza Sedaghat ◽  
Vipul Mishra
Keyword(s):  
Execution Time ◽  
Design Space Exploration ◽  
Design Space ◽  
Space Exploration ◽  
Integrated Design ◽  
Hardware Accelerators ◽  
Average Improvement ◽  
Genetic Algorithm Approach ◽  
High Level ◽  
The Cost

Design space exploration is an indispensable segment of High Level Synthesis (HLS) design of hardware accelerators. This paper presents a novel technique for Area-Execution time tradeoff using residual load decoding heuristics in genetic algorithms (GA) for integrated design space exploration (DSE) of scheduling and allocation. This approach is also able to resolve issues encountered during DSE of data paths for hardware accelerators, such as accuracy of the solution found, as well as the total exploration time during the process. The integrated solution found by the proposed approach satisfies the user specified constraints of hardware area and total execution time (not just latency), while at the same time offers a twofold unified solution of chaining based schedule and allocation. The cost function proposed in the genetic algorithm approach takes into account the functional units, multiplexers and demultiplexers needed during implementation. The proposed exploration system (ExpSys) was tested on a large number of benchmarks drawn from the literature for assessment of its efficiency. Results indicate an average improvement in Quality of Results (QoR) greater than 26% when compared to a recent well known GA based exploration method.

Sign in / Sign up

Export Citation Format

Share Document