Influence of the energy density on the structure and morphology of polycrystalline silicon films treated with electron beam

2007 ◽  
Vol 136 (1) ◽  
pp. 87-91 ◽  
Author(s):  
L. Fu ◽  
F. Gromball ◽  
C. Groth ◽  
K. Ong ◽  
N. Linke ◽  
...  
2007 ◽  
Vol 544-545 ◽  
pp. 471-474
Author(s):  
L. Fu ◽  
F. Gromball ◽  
J. Müller

Line shaped electron beam was used for the recrystallization of nanocrystalline silicon layer that had been deposited on the low cost borosilicate glass-substrate in this paper. Polycrystalline silicon films of a 20μm thickness, which are the base for a solar cell absorber, have been investigated. Tungstendisilicide (WSi2) was formed at the tungsten/silicon interface as well as grain boundaries of the silicon. WSi2 improved the wetting and adhesion of the silicon melt. The surface morphology of the film was strongly influenced by the recrystallization energy density applied. Low energy density resulted in non wetted WSi2/W areas due to the reaction between the silicon melt and the tungsten. With the increased energy, the capping layer become smooth and continuous due to the pinholes becomes fewer and smaller. Excess of the energy density led to larger voids in the capping layer, more WSi2/Si eutectic crystallites, a thinner tungsten layer, and a thicker tungstendisilicide layer.


2003 ◽  
Vol 150 (4) ◽  
pp. 293 ◽  
Author(s):  
R. Bilyalov ◽  
J. Poortmans ◽  
R. Sharafutdinov ◽  
S. Khmel ◽  
V. Schukin ◽  
...  

1981 ◽  
Vol 39 (8) ◽  
pp. 645-647 ◽  
Author(s):  
Kenji Shibata ◽  
Tomoyasu Inoue ◽  
Tadahiro Takigawa ◽  
Shintaro Yoshii

1997 ◽  
Vol 48 (1-4) ◽  
pp. 327-333 ◽  
Author(s):  
Tetsuo Takahashi ◽  
Ryuichi Shimokawa ◽  
Yasuhiro Matsumoto ◽  
Kenichi Ishii ◽  
Toshihiro Sekigawa

Author(s):  
H. Yen ◽  
E. P. Kvam ◽  
R. Bashir ◽  
S. Venkatesan ◽  
G. W. Neudeck

Polycrystalline silicon, when highly doped, is commonly used in microelectronics applications such as gates and interconnects. The packing density of integrated circuits can be enhanced by fabricating multilevel polycrystalline silicon films separated by insulating SiO2 layers. It has been found that device performance and electrical properties are strongly affected by the interface morphology between polycrystalline silicon and SiO2. As a thermal oxide layer is grown, the poly silicon is consumed, and there is a volume expansion of the oxide relative to the atomic silicon. Roughness at the poly silicon/thermal oxide interface can be severely deleterious due to stresses induced by the volume change during oxidation. Further, grain orientations and grain boundaries may alter oxidation kinetics, which will also affect roughness, and thus stress.Three groups of polycrystalline silicon films were deposited by LPCVD after growing thermal oxide on p-type wafers. The films were doped with phosphorus or arsenic by three different methods.


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